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PCF2113 Просмотр технического описания (PDF) - NXP Semiconductors.

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производитель
PCF2113
NXP
NXP Semiconductors. NXP
PCF2113 Datasheet PDF : 65 Pages
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NXP Semiconductors
PCF2113x
LCD controllers/drivers
8.11 Character generator RAM
Up to 16 user-defined characters may be stored in the Character Generator RAM
(CGRAM). Some CGRAM characters (see Figure 18 and Figure 19) are also used to drive
icons (6 if icons blink and both icon rows are used in the application; 3 if no blink but both
icon rows are used in the application; 0 if no icons are driven by the icon rows). The
CGROM and CGRAM use a common address space, of which the first column is reserved
for the CGRAM (see Figure 7, Figure 8, Figure 9 and Figure 10).
Figure 11 shows the addressing principle for the CGRAM.
character codes
(DDRAM data)
76 5 43 2 10
higher
order
bits
lower
order
bits
00 0 00 0 00
00 0 00 0 01
00 0 00 0 10
CGRAM
address
6 5 43 2 10
higher
order
bits
lower
order
bits
00 0 00 0 0
001
010
011
100
101
110
111
00 0 10 0 0
001
010
011
100
101
110
111
0 0 1 00 0 0
001
character patterns
(CGRAM data)
4 3 21 0
higher
order
bits
lower
order
bits
0
0 00
0 00
0
0
00
00
0
0 00
0 0 00 0
0 00
0
0
0
00
00
00
00
00
00
0 0 00 0
character
pattern
example 1
cursor
position
character
pattern
example 2
character code
(CGRAM data)
4 3 21 0
1 1 11 0
1 0 00 1
1 0 00 1
1 1 11 0
1 0 10 0
1 0 01 0
1 0 00 1
0 0 00 0
1 0 00 1
0 1 01 0
1 1 11 1
0 0 10 0
1 1 11 1
0 0 10 0
0 0 10 0
0 0 00 0
mge995
00 0 01 1 11
00 0 01 1 11
00 0 01 1 11
00 0 01 1 11
1111100
1111101
1111110
1111111
Character code bits 0 to 3 correspond to CGRAM address bits 3 to 6.
CGRAM address bits 0 to 2 designate the character pattern line position. The 8th line is the cursor position and display is
performed by logic OR with the cursor. Data in the 8th position appears in the cursor position.
Character pattern column positions correspond to CGRAM data bits 0 to 4, as shown in this figure.
CGRAM character patterns are selected when character code bits 4 to 7 are all logic 0. CGRAM data = logic 1 corresponds to
selection for display.
Only bits 0 to 5 of the CGRAM address are set by the ‘set CGRAM address’ command. Bit 6 can be set using the ‘set DDRAM
address’ command in the valid address range or by using the auto-increment feature during CGRAM write. All bits 0 to 6 can be
read using the ‘read busy flag’ and ‘address counter’ command.
Fig 11. Relationship between CGRAM addresses, data and display patterns
8.12 Cursor control circuit
The cursor control circuit generates the cursor underline and/or cursor blink as shown in
Figure 12 at the DDRAM address contained in the address counter.
When the address counter contains the CGRAM address the cursor will be inhibited.
PCF2113_FAM_4
Product data sheet
Rev. 04 — 4 March 2008
© NXP B.V. 2008. All rights reserved.
18 of 65

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