PCA9512ADP(2009) Просмотр технического описания (PDF) - NXP Semiconductors.
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PCA9512ADP Datasheet PDF : 23 Pages
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NXP Semiconductors
PCA9512A
Level shifting hot swappable I2C-bus and SMBus bus buffer
Table 5. Characteristics …continued
VCC = 2.7 V to 5.5 V; Tamb = −40 °C to +85 °C; unless otherwise specified.
Symbol
Parameter
Conditions
System characteristics
fSCL
SCL clock frequency
tBUF
bus free time between a
STOP and START condition
tHD;STA
hold time (repeated) START
condition
tSU;STA
set-up time for a repeated
START condition
tSU;STO
set-up time for STOP
condition
tHD;DAT
tSU;DAT
tLOW
data hold time
data set-up time
LOW period of the SCL
clock
tHIGH
HIGH period of the SCL
clock
tf
fall time of both SDA and
SCL signals
tr
rise time of both SDA and
SCL signals
Min
Typ
[8] 0
-
[8] 1.3
-
[8] 0.6
-
[8] 0.6
-
[8] 0.6
-
[8] 300
-
[8] 100
-
[8] 1.3
-
[8] 0.6
-
[8][9] 20 + 0.1 × Cb -
[8][9] 20 + 0.1 × Cb -
Max
Unit
400
kHz
-
µs
-
µs
-
µs
-
µs
-
ns
-
ns
-
µs
-
µs
300
ns
300
ns
[1] This specification applies over the full operating temperature range.
[2] Card side supply voltage.
[3] The enable time is from power-up of VCC and VCC2 ≥ 2.7 V to when idle or stop time begins.
[4] Idle time is from when SDAn and SCLn are HIGH after enable time has been met.
[5] Itrt(pu) varies with temperature and VCC voltage, as shown in Section 11.1 “Typical performance characteristics”.
[6] Input pull-up voltage should not exceed power supply voltage in operating mode because the rise time accelerator will clamp the voltage
to the positive supply rail.
[7] The connection circuitry always regulates its output to a higher voltage than its input. The magnitude of this offset voltage as a function
of the pull-up resistor and VCC voltage is shown in Section 11.1 “Typical performance characteristics”.
[8] Guaranteed by design, not production tested.
[9] Cb = total capacitance of one bus line in pF.
PCA9512A_4
Product data sheet
Rev. 04 — 19 August 2009
© NXP B.V. 2009. All rights reserved.
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