Philips Semiconductors
16-bit I2C LED dimmer
Product data
PCA9532
AC SPECIFICATIONS
SYMBOL
PARAMETER
STANDARD MODE
I2C-BUS
MIN
MAX
FAST MODE
I2C-BUS
MIN
MAX
fSCL
Operating frequency
0
tBUF
Bus free time between STOP and START conditions
4.7
tHD;STA
Hold time after (repeated) START condition
4.0
tSU;STA
Repeated START condition set-up time
4.7
tSU;STO
Setup time for STOP condition
4.0
tHD;DAT
Data in hold time
0
tVD;ACK
Valid time for ACK condition2
—
tVD;DAT (L)
Data out valid time3
—
tVD;DAT (H)
Data out valid time3
—
tSU;DAT
Data set-up time
250
tLOW
Clock LOW period
4.7
tHIGH
Clock HIGH period
4.0
tF
Clock/Data fall time
—
tR
Clock/Data rise time
—
tSP
Pulse width of spikes that must be suppressed by the
—
input filters
100
—
—
—
—
—
600
600
1500
—
—
—
300
1000
50
0
400
1.3
—
0.6
—
0.6
—
0.6
—
0
—
—
600
—
600
—
600
100
—
1.3
—
0.6
—
20 + 0.1 Cb1
300
20 + 0.1 Cb1
300
—
50
Port Timing
tPV
tPS
tPH
Reset
Output data valid
Input data set-up time
Input data hold time
—
200
100
—
1
—
—
200
100
—
1
—
tW
tREC
tRESET4,5
Reset pulse width
Reset recovery time
Time to reset
10
—
0
—
400
—
10
—
0
—
400
—
NOTES:
1. Cb = total capacitance of one bus line in pF.
2. tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
3. tVD;DAT = minimum time for SDA data out to be valid following SCL LOW.
4. Resetting the device while actively communicating on the bus may cause glitches or errant STOP conditions.
5. Upon reset, the full delay will be the sum of tRESET and the RC time constant of the SDA bus.
UNITS
kHz
µs
µs
µs
µs
ns
ns
ns
ns
ns
µs
µs
ns
ns
ns
ns
ns
µs
ns
ns
ns
2003 May 02
13