OM6211 Просмотр технического описания (PDF) - Philips Electronics

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OM6211

48×84 dot matrix LCD driver

Philips Electronics 

Philips Semiconductors

48 × 84 dot matrix LCD driver

Product specification

OM6211

11.2.2 READ MODE

In the read mode of the interface the microcontroller reads

data from the OM6211. To do so the microcontroller first

has to send the read status command, and then the

following byte is transmitted in the opposite direction

(using SDOUT). After that SCE is required to go HIGH

before a new command is sent (see Fig.15).

The OM6211 samples the SDIN data on the rising edges

of SCLK, but shifts SDOUT data on the falling edges of

SCLK. Thus the microcontroller is supposed to read

SDOUT data on the rising edges of SCLK.

After the read status command has been sent, the SDIN

line must be set to 3-state not later then the falling SCLK

edge of the last bit (see Fig.15).

The 8th read bit is shorter than the others because it is

terminated by the rising edge of SCLK (see Fig.15). The

last rising edge of SCLK sets SDOUT to 3-state after the

delay time t3 (see Section 10.1 and Fig.17).

There are 5 bits of information only that can be read by the

microcontroller (see Table 7). Two of them are chip

identification bits and have fixed values. The next two bits

are LCD module identification bits and can be set by

connecting the ID3 and ID4 pins to VDD1 or VSS. The fifth

bit is the VLCD voltage monitor bit VM.

It indicates that the charge pump is running and the

voltage level of VLCD is sufficient to provide enough

contrast of the display (VM = 1). If the VLCD generator

cannot produce a voltage defined by VOP, then VM = 0.

VM has a valid value 45 ms after a delay time of

approximately 45 ms starting from the time the VLCD

generator has been switched on (by setting HVE = 1). This

delay time is dependent on the external VLCD decoupling

capacitor (here 100 nF is assumed).

For more details concerning the VM bit see Chapter 22

The reading out of the chip identification bits and module

identification bits can be used to implement different

initialization schemes for different applications. The

reading out of VM can be used to check the proper

electrical contacts of the LCD module.

One read status command enables one status bit to be

read, i.e. 5 commands are needed to read the status of all

5 bits. The first 4 bits of the read byte (DB7 to DB4) are

always equal to the corresponding status bit and the next

4 bits (DB3 to DB0) are equal to the complement of this bit.

As stated before the SDOUT data is supposed to be read

on the rising edge of SCLK. Care must be taken, however,

when running the SCLK at maximum frequency. Because

of the access time limit t2 (see Section 10.1 and Fig.17) it

might happen that the first bits of each group (DB7 to DB4

and DB3 to DB0) are not valid at the time of the

corresponding SCLK edges. Thus it is recommended to

read the bits DB4 and DB0 only.

handbook, full pagewidth

SCE

SCLK

SDIN

D/C DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

SDOUT

DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Fig.15 Read mode.

D/C

MGU282

2002 Jan 17

20

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