NJW1168 Просмотр технического описания (PDF) - Japan Radio Corporation
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NJW1168 Datasheet PDF : 34 Pages
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PRELIMINARY
NJW1168
s DEFINITION OF I2C REGISTER
♦I2C BUS FORMAT
MSB
LSB
S
Slave Address
A
MSB
LSB
Select Address
MSB
A
1bit
8bit
1bit
8bit
1bit
S: Starting Term
A: Acknowledge Bit
P: Ending Term
♦SLAVE ADDRESS
Data
8bit
LSB
AP
1bit 1bit
MSB
1
0
Slave Address
0
0
0
0
Hex
LSB
-
0
0
80(h)
♦CONTROL REGISTER TABLE
The select address sets each function (Volume, Balance, Trimmer, Bass Boost Select, Tone Control, Surround, AGC,
Voice Enhancement, Input Selector, Monitor Out, AUX).
The auto increment function cycles the select address as follows.
00H¡01H¡02H¡03H¡04H¡05H¡06H¡00H
<Write Mode>
Select
BIT
Address
D7
D6
D5
D4
D3
D2
D1
D0
00H
VOL
01H
CHS
BAL
✴
02H
TRIM
BBSW
03H
BCB
BASS
✴
04H
BCT
TREB
✴
05H
SUR
AGC
06H
VE
MOSW
AUX1
AUX0
SEL
✴ : Don’t Care
♦CONTROL REGISTER DEFAULT VALUE
Control register default value is all “0”.
Select
BIT
Address
D7
D6
D5
D4
D3
D2
D1
D0
00H
0
0
0
0
0
0
0
0
01H
0
0
0
0
0
0
0
0
02H
0
0
0
0
0
0
0
0
03H
0
0
0
0
0
0
0
0
04H
0
0
0
0
0
0
0
0
05H
0
0
0
0
0
0
0
0
06H
0
0
0
0
0
0
0
0
-15-
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