NCP3063B(2006) Просмотр технического описания (PDF) - ON Semiconductor

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NCP3063B
(Rev.:2006)

1.5 A, Step−Up/Down/Inverting Switching Regulators

ON Semiconductor 

NCP3063, NCP3063B, NCV3063

INTRODUCTION

The NCP3063 is a monolithic power switching regulator

optimized for dc to dc converter applications. The

combination of its features enables the system designer to

directly implement step−up, step−down, and voltage−

inverting converters with a minimum number of external

components. Potential applications include cost sensitive

consumer products as well as equipment for industrial

markets. A representative block diagram is shown in

Figure 2.

controlled by the oscillator, thus pumping up the output filter

capacitor. When the output voltage level reaches nominal,

the output switch next cycle turning on is inhibited. The

feedback comparator will enable the switching immediately

when the load current causes the output voltage to fall below

nominal. Under these conditions, output switch conduction

can be enabled for a partial oscillator cycle, a partial cycle

plus a complete cycle, multiple cycles, or a partial cycle plus

multiple cycles. (See AN920/D for more information).

Operating Description

The NCP3063 is a hysteric, dc−dc converter that uses a

gated oscillator to regulate output voltage. In general, this

mode of operation is somewhat analogous to a capacitor

charge pump and does not require dominant pole loop

compensation for converter stability. The Typical Operating

Waveforms are shown in Figure 12. The output voltage

waveform shown is for a step−down converter with the

ripple and phasing exaggerated for clarity. During initial

converter startup, the feedback comparator senses that the

output voltage level is below nominal. This causes the

output switch to turn on and off at a frequency and duty cycle

Oscillator

The oscillator frequency and off−time of the output switch

are programmed by the value selected for timing capacitor

CT. Capacitor CT is charged and discharged by a 1 to 6 ratio

internal current source and sink, generating a positive going

sawtooth waveform at Pin 3. The oscillator peak and valley

voltage difference is 500 mV typically. To calculate the CT

capacitor value for required oscillator frequency, use the

equations found in Figure 13. An Excel based design tool

can be found at www.onsemi.com on the NCP3063 product

page.

1

Feedback Comparator Output

0

1

IPK Comparator Output

0

Timing Capacitor, CT

On

Output Switch

Off

Nominal Output Voltage Level

Output Voltage

Startup

Operation

Figure 12. Typical Operating Waveforms

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