NCP1218 Просмотр технического описания (PDF) - ON Semiconductor

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NCP1218

PWM Controller with Adjustable Skip Level and External Latch Input

ON Semiconductor 

NCP1218

Skip Cycle Operation

During standby or light load operation the duty ratio on

the controller becomes very small. At this point, a

significant portion of the power dissipation is related to the

power MOSFET switching on and off. To reduce this power

dissipation, the NCP1218 “skips” pulses when the FB level

drops below the skip threshold. The level at which this

occurs is completely adjustable by setting a resistor on the

Skip/latch pin.

By discontinuing pulses, the output voltage slowly drops

and the FB voltage rises. When the FB voltage rises above

the Vskip level, DRV is turned back on. This feature

produces the timing diagram shown in Figure 37.

Vskip

VFB

Skip

ID

Skip peak current, %ICSSKIP, is the percentage of the

maximum peak current at which the controller enters skip

mode. %ICSSKIP can be any value from 0 to 43% as defined

by Equation 9. However, the higher %ICSSKIP is, the greater

the drain current when skip is entered. This increases

acoustic noise. Conversely, the lower %ICSSKIP is, the

larger the percentage of energy is expended turning the

switch on and off. Therefore, it is important to adjust

%ICSSKIP to the optimal level for a given application.

%ICSSKIP

+

Vskip

3V

@

100

(eq. 9)

Figure 38 shows the details of the Skip/latch pin

circuitry. The voltage on the Skip/latch pin determines the

voltage required on the FB pin to place the controller into

skip mode. If the pin is left open, the default skip threshold

is 1.1 V. This corresponds to a 37% %ICSSKIP (%ICSSKIP =

1.1 V / 3.0 V * 100% = 37%). Therefore, the controller will

enter skip mode when the peak current is less than 37% of

the maximum peak current.

Figure 37. Skip Operation

Skip/latch

+

VSkip/latch Rskip Cskip

-

2V

Rupper

42.0 k

R lower

51.3 k

Vlatch

-

+

latch-off, reset

when VCC < VCC(reset)

50 us

filter

S

RQ

VSkip

VFB

Figure 38. Skip Adjust Circuit

Vskip(MAX)

Vskip/Latch

+

Skip -

Comparator

To DRV

latch

reset

The skip level is reduced by placing an external resistor,

Rskip, between the Skip/latch and GND pins. Figure 39

summarizes the operating voltage regions of the Skip/latch

pin.

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