NCP1200AP60G Просмотр технического описания (PDF) - ON Semiconductor

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NCP1200AP60G

PWM Current-Mode Controller for Universal Off-Line Supplies Featuring Low Standby Power

ON Semiconductor 

NCP1200A

Protecting the Controller Against Negative Spikes and

Turn−off Problems

As with any controller built upon a CMOS technology, it

is the designer’s duty to avoid the presence of negative

spikes on sensitive pins. Negative signals have the bad habit

to forward bias the controller substrate and induce erratic

behaviors. Sometimes, the injection can be so strong that

internal parasitic SCRs are triggered, engendering

irremediable damages to the IC if they are a low impedance

path is offered between VCC and GND. If the current sense

pin is often the seat of such spurious signals, the

high−voltage pin can also be the source of problems in

certain circumstances. During the turn−off sequence, e.g.

when the user unplugs the power supply, the controller is

still fed by its VCC capacitor and keeps activating the

MOSFET ON and OFF with a peak current limited by

Rsense. Unfortunately, if the quality coefficient Q of the

resonating network formed by Lp and Cbulk is low (e.g. the

MOSFET Rdson + Rsense are small), conditions are met to

make the circuit resonate and thus negatively bias the

controller. Since we are talking about ms pulses, the amount

of injected charge (Q = I x t) immediately latches the

controller which brutally discharges its VCC capacitor. If

this VCC capacitor is of sufficient value, its stored energy

damages the controller. Figure 22 depicts a typical negative

shot occurring on the HV pin where the brutal VCC

discharge testifies for latchup.

Figure 22. A negative spike takes place on the Bulk capacitor at the switch−off sequence

In low VCC conditions, the NCP1200A gate drive signal

show an abnormal behavior and can stay high a few tens of

milliseconds. This problem can occur at turn−off but is

usually harmless since the bulk capacitor has been

discharged by the switching pulses. However, the problem

can become worse if high VT MOSFETs are implemented.

Be sure that the selected MOSFET VT is between 2.0 V

(minimum) and 4.0 V (maximum). Figure 23 shows the

typical operating waveforms.

VCC

VFB

Vbulk = 0

Vgs

Figure 23. If quick VCC depletion is lacking, the drive output can remain high.

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