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NCL30002

Power Factor Corrected Buck LED Driver

ON Semiconductor 

NCL30002

ZCD Detection Block

A dedicated circuit block is necessary to implement the

zero current detection. The NCL30002 provides a separate

input pin to signal the controller to turn the power switch

back on just after inductor current reaches zero. When the

output winding current reaches zero the winding voltage

will reverse. Since all windings of the inductor reflect the

same voltage characteristic this voltage reversal appears on

the bias winding. Coupling the winding voltage to the ZCD

input of the NCL30002 allows the controller to start the next

switching cycle at the precise time. To avoid false triggering,

the ZCD input has a dual comparator input structure to arm

the latch when the ZCD detect voltage rises above 1.4 V

(nominal) thus setting the latch. When the voltage on ZCD

falls below 0.7 V (nominal) a zero current event is detected

and a signal is asserted which initiates the next switching

cycle. This is illustrated in Figure 27. The input of the ZCD

has an internal circuit which clamps the positive and

negative voltage excursions on this pin. The current into or

out of the ZCD pin must be limited to ±10 mA with an

external resistor.

Varm

Vtrig

Bias Winding Voltage

NZCD

ZCD

RZCD

+

−

VZCD(ARM)

DRIVE

+

−

VZCD(TRIG)

ZCD Clamp

SQ

Reset

Dominant

Latch

RQ

Demag

Figure 27. ZCD Operation

At startup, there is no energy in the ZCD winding and no

voltage signal to activate the ZCD comparators. To enable

the controller to start under these conditions, an internal

watchdog timer is provided which initiates a switching cycle

in the event that the output drive has been off for more than

180 ms (nominal).

The timer is deactivated only under an OVP or UVP fault

condition which will be discussed in the next section.

CS

The dedicated CS pin of the NCL30002 senses the current

through the MOSFET switch and the output inductor. If the

voltage of the CS pin exceeds VILIM, the internal comparator

will detect the event and turn off the MOSFET. The peak

switch current is calculated using Equation 1:

ISW(peak)

+

VILIM

Rsense

(eq. 1)

To avoid false detection, the NCL30002 incorporates

leading edge blanking circuit (LEB) which masks the CS

signal for a nominal time of 190 ns. If required, an optional

RC filter can be added between Rsense and CS to provide

additional filtering. This is illustrated below.

DRV

Rsense

CS

LEB

optional

+

−

VILIM

OCP

Figure 28. CS Circuitry with Optional

External RC Filter

MFP Input

The multi−function pin connects to the inverting terminal

of the transconductance amplifier, the undervoltage and

overvoltage protection comparators. This allows this pin to

perform several functions. To place the device in standby,

the MFP pin should be pulled below the Vuvp threshold. This

is illustrated in Figure 29. Additionally, raising the MFP pin

above Vovp will also suspend switching activity but not place

the controller in the standby mode. This can be used

implement overvoltage monitoring on the bias winding and

add an additional layer of fault protection.

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