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HI5721-EVS(1999) Просмотр технического описания (PDF) - Intersil

Номер в каталоге
Компоненты Описание
производитель
HI5721-EVS
(Rev.:1999)
Intersil
Intersil Intersil
HI5721-EVS Datasheet PDF : 14 Pages
First Prev 11 12 13 14
HI5721
BASEBAND
BIT
STREAM
ENCODER
40 MSPS
I CLK
Q
CONTROL
CONTROLLER
BUS
U1
16
CLK
19
P1
20
P0
18 LOAD#
17
TXFR#
12
ENPHAC#
9
SEL_L/M#
OUT11 6
OUT10 5
OUT9 4
OUT8 3
OUT7 2
OUT6 1
OUT5 28
OUT4 27
OUT3 26
OUT2 25
OUT1 24
OUT0 23
14
SCLK
13
SD
10 SFTEN#
U2
14
VCC
DVDD
IOUT 20
1 D9 (MSB)
2 D8
3 D7
4 D6
IOUT/ 21
5 D5
6 D4
7 D3
8 D2
9 D1
23
REF IN
24
C AMP OUT
10 D0 (LSB)
26
11
CLK
C AMP IN
25
13
REF OUT
INVERT
R4
50
28
15
DVSS
DVSS
17
RSET
ARET 19
FILTER
R1
TO RF
UP-CONVERT
STAGE
64
R1
64
+
C2 1.0µF -5.2V_A
-5.2V_A
C1 0.01µF
R1
1960
11 MSB/LSB#
HSP45102
-5.2V_D
27 DVEE
16 DVEE
AVSS 18
AVEE 22 -5.2V_A
HI5721
-5.2V_D
L1
10µH
-5.2V_A
L2
10µH
FIGURE 26. PSK MODULATOR USING THE HI5721 AND THE HSP45102 12-BIT NCO
Differential Phase, ∆Φ, is the phase error from and ideal
sine wave.
Signal to Noise Ratio, SNR, is the ratio of a fundamental to
the noise floor of the analog output. The first 5 harmonics
are ignored, and an output filter of 1/2 the clock frequency is
used to eliminate alias products.
Total Harmonic Distortion, THD, is the ratio of the DAC
output fundamental to the RMS sum of the harmonics. The
first 5 harmonics are included, and an output filter of 1/2 the
clock frequency is used to eliminate alias products.
Spurious Free Dynamic Range, SFDR, is the amplitude
difference from a fundamental to the largest harmonically or
non-harmonically related spur. A sine wave is loaded into the
D/A and the output filtered at 1/2 the clock frequency to
eliminate noise from clocking alias terms.
Intermodulation Distortion, IMD is the measure of the sum
and difference products produced when a two tone input is
driven into the D/A. The distortion products created will arise
at sum and difference frequencies of the two tones. IMD is
IMD = 2----0----l-o---g------(--R----(M--R---S--M----o-S--f----sa---u-m--m---p---l-ai--t-nu---d-d---e-d----io-f--ff-e---t-rh--e--e-n---c-f--ue---n--d-d---i-as---mt--o---er--t-n-i-o--t-an----l-)p----r--o---d---u----c---t-s----)
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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