MX7534 Просмотр технического описания (PDF) - Maxim Integrated
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MX7534 Datasheet PDF : 16 Pages
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Microprocessor-Compatible,
14-Bit DACs
A0–A15
MREQ
Z80
WR
D8–D7
ADDRESS BUS
ADDRESS
DECODE
DATA BUS
*SOME CIRCUITRY OMITTED FOR CLARITY
Figure 12a. MX7535—Z80 Interface
CSLSB
CSMSB
LDAC
MX7535*
WR
D8–D13
D0–D7
A0–A15
MREQ
Z80
WR
D0–D7
ADDRESS BUS
ADDRESS
DECODE
DATA BUS
*SOME CIRCUITRY OMITTED FOR CLARITY
Figure 12b. MX7534—Z80 Interface
A0 A1
CS
MX7534*
WR
D0–D7
A0–A15
R/W
Q
E
MC6809
D0–D7
ADDRESS BUS
ADDRESS
DECODE
DATA BUS
A0 A1
CS
MX7534*
WR
D0–D7
*SOME CIRCUITRY OMITTED FOR CLARITY
Figure 13a. MX7534—MC6809 Interface Circuit
A0–A15
A0 A1
ADDRESS
DECODE
WR
MICRO-
PROCESSOR
SYSTEM
D0–D7
EN
QUAD LATCH
EN
QUAD LATCH
EN
QUAD LATCH
A1 CS
A0
WR
MX7534*
D0–D7
*SOME CIRCUITRY OMITTED FOR CLARITY
Figure 14a. MX7534—Interface Circuit Using Latches to
Minimize Digital Feedthrough
A0–A15
R/W
6502
∅2
D0–D7
ADDREASDSDBRUESSS BUS
ADDRESS
DECODE
DATA BUS
*SOME CIRCUITRY OMITTED FOR CLARITY
Figure 13b. MX7534—6502 Interface
A0 A1
CS
MX7534*
WR
D0–D7
A0–A15
MICRO-
PROCESSOR
SYSTEM
WR
D0–D15
ADDRESS
DECODE
EN
16-BIT
LATCH
CSMSB
CSLSB
LDAC
WR
MX7535*
D0–D13
*SOME CIRCUITRY OMITTED FOR CLARITY
Figure 14b. MX7535—Interface Circuit Using Latches to
Minimize Digital Feedthrough
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