MT9076 Просмотр технического описания (PDF) - Mitel Networks

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производитель

MT9076

T1/E1/J1 3.3V Single Chip Transceiver

Mitel Networks 

MT9076

Preliminary Information

(i) It may free - run with the internal multiframe counters;

(ii) The multiframe counters may be reset with the external hardware pin TxMF. If this signal is not

synchronous with the current transmit frame count it may cause the far end to go temporarily out of sync.

(iii) Under software control (by setting the TxSYNC bit in page 01 address 12H) the transmit multiframe

counters will be synchronized to the framing pattern present in the overhead bits multiplexed into channel

31 bit 0 of the incoming 2.048 Mb/s digital stream DSTi. Note that the overhead bits extracted from the

receive signal are multiplexed into outgoing DSTo channel 31 bit 0.

(iv) In SLC - 96 mode the transmit frame counters synchronize to the framing pattern clocked in on the TXDL

input

Frame #

1

2

3

4

5

6

7

8

9

10

11

12

Ft

Fs

1

0

0

0

1

1

0

1

1

1

0

0

Table 7 - D4 Superframe Structure(T1)

Signaling

A

B

Frame #

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

26

FPS

FDL

CRC

X

CB1

X

0

X

CB2

X

0

X

CB3

X

1

X

CB4

X

0

X

CB5

X

1

X

CB6

X

1

Table 8 - ESF Superframe Structure (T1)

Signaling

A

B

C

D

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