¡ Semiconductor
PAD/MUTE Processing Timing
SYNCA
BCLKA
SIA
MSB
LSB
78.125ms
Internal 12dBPAD Processing Timing
121.09ms
Internal MUTE Processing Timing
78.125ms
78.125ms
MSM7580
PAD Mode; MUTE1 and MUTE 2 Timings PAD/MUTE="H"
MUTE1, 2
SYNCP
BCLKP
SOP
MSB
LSB
0dB transmit data
12dB loss transmit data
0dB transmit data
MUTE Mode; MUTE1 and MUTE 2 Timings PAD/MUTE="L"
MUTE1, 2
SYNCP
BCLKP
SOP
MSB
LSB
0dB transmit data
MUTE (idle channel state)
0dB transmit data
As mentioned above, PAD and MUTE processings are carried out according to the rising edge
of SYNCA.
Even if BCLK is not 128 kHz, these processings are performed in the absolute time counted from
the rising edge of SYNCA.
Therefore, MUTE1 and MUTE 2 pins must be controlled so as to cover there processsings.
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