¡ Semiconductor
MSM7503
Digital Interface Characteristics
Parameter
Symbol
Condition
Digital Output (Latch) Delay Time tpd LA WRÆLA, LB
See Fig. 2
Key Scanning
Output Delay Time
tpd scn
WRÆPO0 to PO7
Pull-up resistance 10 kW
See
Fig. 2
Digital Output (Data) Delay Time tpd data RDÆDB0~DB7
See Fig. 2
Delay Time of Power
Supply Voltage Detect
tdRST1
tdRST2
LRSTN 0Æ1
LRSTN 1Æ0
See Fig. 1
Delay Time of LRSTN
due to WDT
TWDT
tdRST3
tWRST
See Fig. 1
tdSCK1 SYNCÆCLK1
See Fig. 3
CLK Output Delay Time
tsSCK2
tdSCK3
SYNCÆCLK2
SYNCÆCLK3
See Fig. 4
B Signal Delay Time
tdFHW
CLK1ÆFHW
See Fig. 3
D Signal Output Delay Time tdFD
CLK2ÆFD
LÆH
See Fig. 4 HÆL
K Signal Output Delay Time tdFK
LÆH
See Fig. 4 HÆL
SYNC Output Frequency
fSYNC
SYNC Output Width
TWSYNC
CLK1 Output Frequency
fCLK1
CLK2 Output Frequency
fCLK2
CLK3 Output Frequency
fCLK3
CLK Output Duty Ratio
—
CLK1, CLK2, CLK3
Line Output Signal Width
tWF T1N, T2N "L" Width
See Fig. 5
Clock Output Jitter Width
SYNC, CLK1, CLK2
CLK3 When use Xtal
(VDD = 5 V ±5%, Ta = –10°C to 70°C)
Min. Typ. Max. Unit
0.2
—
1.5 ms
0.2
—
1.5 ms
10
20
100 ns
—
128
— ms
—
0.01
— ms
—
500
— ms
—
0.85
—
—
1.7
—
ms
366
—
488
366
—
488 ns
366
—
488
—
10
— ns
—
340
—
ns
—
10
—
—
740
—
ns
—
500
—
—
8
— kHz
—
16.6
— ms
—
64
— kHz
—
16
— kHz
—
256
— kHz
—
50
—
%
—
1.953
— ms
—
250
— ns
19/41