MSM6222 Просмотр технического описания (PDF) - Oki Electric Industry
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MSM6222
Oki Electric Industry
MSM6222 Datasheet PDF : 45 Pages
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¡ Semiconductor
MSM6222B-xx
Generate biases externally and input them to the MSM6222B-xx (VDD, V1, V2, V3, V4,
and V5).
When the number of biases is 4, input the same potential to V2 and V3. The execution
time, when the OSC oscillation frequency is 250 kHz, is 40 ms.
(7) CG RAM address setting
R/W RS DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Instruction code L L L H C5 C4 C3 C2 C1 C0
When CG RAM addresses, bits C5 to C0 (binary), are set, the CG RAM is specified, until
the DD RAM address is set.
Write/read of the character pattern to and from the CPU begins with addresses, bits C5
to C0, starting from CG RAM selection.
The execution time, when the OSC oscillation frequency is 250 kHz, is 40 ms.
(8) DD RAM address setting
R/W RS DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Instruction code L L H D6 D5 D4 D3 D2 D1 D0
When the DD RAM addresses D6 to D0 (binary) are selected, the DD RAM is specified
until the DD RAM address is set.
Write/read of the character code to and from the CPU begins with addresses D6 to D0
starting from DD RAM selection.
In the 1-line display mode (N = H), however, D6 to D0 (binary) must be set to one of the
values among "00" to "4F" (hex.).
Likewise, in the 2-line mode, D6 to D0 (binary) must be set to one of the values among
"00" to "27" (hex.) or "40" to "67" (hex.).
When any value other than the above is input, it is impossible to make a normal write/
read of character codes to and from the DD RAM.
The execution time, when the OSC oscillation frequency is 250 kHz, is 40 ms.
(9) DD RAM and CG RAM data write
R/W RS DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Instruction code L H E7 E6 E5 E4 E3 E2 E1 E0
When E7 to E0 (binary) codes are written to the DD RAM or CG RAM, the cursor and
display move as described in "(5) Cursor and display shift". The execution time, when
the OSC oscillation frequency is 250 kHz, is 40 ms.
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