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EV2351DQ-00A Просмотр технического описания (PDF) - Monolithic Power Systems

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Компоненты Описание
производитель
EV2351DQ-00A
MPS
Monolithic Power Systems MPS
EV2351DQ-00A Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
TM
MP2351 – 1.5A, 23V, 1.4MHz STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameter
Symbol Condition
Maximum Duty Cycle
Minimum On Time
EN Shutdown Threshold Voltage
Enable Pull Up Current
EN UVLO Threshold Rising
EN UVLO Threshold Hysteresis
DMAX VFB = 1.0V
TON (MIN) VFB = 1.5V
ICC > 100µA
VEN = 0V
VEN Rising
Supply Current (Shutdown)
Supply Current (Quiescent)
Thermal Shutdown
VEN 0.4V
VEN 3V, VFB = 1.4V
Note:
4) Equivalent output current = 1.5A 50% Duty Cycle
2.0A 50% Duty Cycle
Assumes ripple current = 30% of load current.
Slope compensation changes current limit above 40% duty cycle.
Min
Typ
Max Units
70
%
70
ns
0.7
1.0
1.3
V
1.15 1.50
µA
2.37 2.50 2.62
V
210
mV
20
36
µA
1.1
1.3
mA
160
°C
PIN FUNCTIONS
Pin #
1
2
3
4
5
6
7
8
9
10
Name Description
NC No Connect.
BS Bootstrap (C5). This capacitor is needed to drive the power switch’s gate above the supply
voltage. It is connected between SW and BS pins to form a floating supply across the power
switch driver. The voltage across C5 is about 5V and is supplied by the internal +5V supply
when the SW pin voltage is low.
NC No Connect.
IN Supply Voltage. The MP2351 operates from a +4.75V to +23V unregulated input. C1 is needed
to prevent large voltage spikes from appearing at the input.
SW Switch. This connects the inductor to either IN through M1 or to GND through M2.
GND Ground. This pin is the voltage reference for the regulated output voltage. For this reason care
must be taken in its layout. This node should be placed outside of the D1 to C1 ground path to
prevent switching current spikes from inducing voltage noise into the part.
FB Feedback. An external resistor divider from the output to GND, tapped to the FB pin sets the
output voltage. To prevent current limit run away during a short circuit fault condition the
frequency foldback comparator lowers the oscillator frequency when the FB voltage is below
700mV.
COMP Compensation. This node is the output of the transconductance error amplifier and the input to the
current comparator. Frequency compensation is done at this node by connecting a series R-C to
ground. See the compensation section for exact details.
EN Enable/UVLO. A voltage greater than 2.62V enables operation. Leave EN unconnected for
automatic startup. An Under Voltage Lockout (UVLO) function can be implemented by the
addition of a resistor divider from VIN to GND. For complete low current shutdown it’s the EN
pin voltage needs to be less than 700mV.
SYNC Synchronization Input. This pin is used to synchronize the internal oscillator frequency to an
external source. There is an internal 11kpull down resistor to GND, therefore leave SYNC
unconnected if unused.
MP2351 Rev. 1.5
www.MonolithicPower.com
3
1/6/2006
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2006 MPS. All Rights Reserved.

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