MCM63Z834TQ10 Просмотр технического описания (PDF) - Motorola => Freescale
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MCM63Z834TQ10 Datasheet PDF : 35 Pages
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Freescale Semiconductor, Inc.
MCM63Z916 TQFP PIN DESCRIPTIONS
Pin Locations
Symbol
85
ADV
89
CK
87
(a) 58, 59, 62, 63, 68, 69, 72, 73, 74
(b) 8, 9, 12, 13, 18, 19, 22, 23, 24
14, 66
CKE
DQx
FT
86
G
31
LBO
32, 33, 34, 35, 44, 45, 46, 47, 48, 49,
50, 80, 81, 82, 83, 99, 100
37, 36
SA
SA0, SA1
93, 94
(a) (b)
98
97
92
88
15, 16, 41, 65, 91
4, 11, 20, 27, 54, 61, 70, 77
5, 10, 17, 21, 26, 40, 55, 60, 64, 67,
71, 76, 90
1, 2, 3, 6, 7, 25, 28, 29, 30, 38, 39, 42,
43, 51, 52, 53, 56, 57, 75, 78, 79,
84, 95, 96
SBx
SE1
SE2
SE3
SW
VDD
VDDQ
VSS
NC
Type
Description
Input Synchronous Load/Advance: Loads a new address into counter when
low. RAM uses internally generated burst addresses when high.
Input Clock: This signal registers the address, data in, and all control signals
except G and LBO.
Input Clock Enable: Disables the CK input when CKE is high.
I/O Synchronous Data I/O: “x” refers to the byte being read or written
(byte a, b).
Input
Flow–Through Option Input: This pin must remain in steady state (this
signal is not registered or latched). It must be tied high or low.
Low — flow–through functionality.
High — pipelined functionality.
Input Asynchronous Output Enable.
Input
Linear Burst Order Input: This pin must remain in steady state (this
signal not registered or latched). It must be tied high or low.
Low — linear burst counter.
High — interleaved burst counter.
Input Synchronous Address Inputs: These inputs are registered and must
meet setup and hold times.
Input
Synchronous Burst Address Inputs: The two LSBs of the address field.
These pins must preset the burst address counter values. These inputs
are registered and must meet setup and hold times.
Input Synchronous Byte Write Inputs: Enables write to byte “x”
(byte a, b) in conjunction with SW. Has no effect on read cycles.
Input Synchronous Chip Enable: Active low to enable chip.
Input Synchronous Chip Enable: Active high for depth expansion.
Input Synchronous Chip Enable: Active low for depth expansion.
Input Synchronous Write: This signal writes only those bytes that have been
selected using the byte write SBx pins.
Supply Core Power Supply.
Supply I/O Power Supply.
Supply Ground.
— No Connection: There is no connection to the chip.
MOTOROLA FAST SRAM
For More Information On This Product,
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MCM63Z834•MCM63Z916
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