MC6800CP Просмотр технического описания (PDF) - Motorola => Freescale

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производитель

MC6800CP

8-BIT MICROPROCESSING UNIT (MPU)

Motorola => Freescale 

Pc

(PC + 2)

FIGURE 32 – RELATIVE ADDRESSING MODE

MPU

MPU

RAM

1

~AM

a PrOaram

MeGory

Instr.

Offset

s Next Instr.

i

Program

Memorv

5008

BEQ

15

Pc

5010 Next Instr.

Pc

t

MPu

ADDR = INOX

+ OFFSET

...3

...

1,’

..,.

-~

OFFSET< 255

....?,k.,\,*ya,\..# . ..

TABLE 10 – RELATIVE MODE CYCLE-BY-CYCLE OPERATION

..,$~,~>.?+..

Address Mod.@x,.,.j:, ‘

cycle VMA

RIG

and I nstruc,$~~ “r’’’*’f Cycles

+ Line

Address Bus

Line

Data Bus

1

{\,t.*>i.:‘>:.~>.:,++.$,,’{,,

BCC BH#~’B~b’

BCS ,@&~@>>@~L

BE Q $~@\$~<. BRA

BG5 &&T ;;:

B&?‘t$.,~A’:*”~R-M I

1

1 OP Code Address

2

1 Op Code Address + 1

4

3

0 Op Code Address t 2

4

0 Branch Address

1 Op Code

1 Branch Offset

1 Irrelevant Data (Note 1 )

1 Irrelevant Data (Note 1 )

BS ~:

1

1 OP Code Address

1 Op Code

2

1 Op Code Address+ 1

1 Branch Offset

3

0 Return Address of Main Program

1 Irrelevant Data (Note 1 )

4

1 Stack Pointer

8

5

1 Stack Pointer – 1

o Return Address (Low Order Byte)

0 Return Address (High Order Byte)

6

0 Stack Pointer – 2

1 Irrelevant Data (Note 1 )

7

0 Return Address of Main Program

1 Irrelevant Data (Note 1 )

Note 1.

8

0 Subroutine Address

1 Irrelevant Data

. . ..-.

. . . . -.,

. . . ,, .,.

,.,

If device which is addressed during this cycle uses VMA, tnen tne UaTa Bus WIII go TO tne nlgn !mpeaance

Depending on bus capacitance, data from the previous cycle may be retained on the Oata Bus.

(Note 1 )

. . . . . . .- —J.. ,-—

~nree-staTe conut~!un.

MOTOROLA

Semiconductor Products Inc.

—

@

29

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