MB86961A Просмотр технического описания (PDF) - Fujitsu

Номер в каталоге

Компоненты Описание

производитель

MB86961A

UNIVERSAL INTERFACE FOR 10BASE -T

Fujitsu 

MB86961A

MODE 1 (MD1=0, MD0=0) TIMING DIAGRAMS — FIGURES 12 - 17

TPIP/TPIN

CD

10101010111010001010

tCD

RCLK

RXD

tDATA

tRDH

tRDS

1 0 1 0 1 0 1 0 1 1 1 01

Figure 12. Mode 1 RCLK/SOP Timing

TPIP/TPIN

101010100

CD

tRD

tCDOFF

tIFG

RCLK

RXD

101010100

Note: RXD is triggered by the rising edge of RCLK, with RCLK advanced by 25 ns. The controller is sampled at the rising edge.

Figure 13. Mode 1 RCLK/EOP Timing

19

Share Link: