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MB86960 Просмотр технического описания (PDF) - Fujitsu

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MB86960 Datasheet PDF : 65 Pages
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MB86960
Note to software engineers regarding NICE/Ether-
Starcompatibility: If you desire to use the same node
driver for Fujitsu’s NICE and EtherStar controllers, the
driver can determine which chip is being used by reading
DLCR7 and/or DLCR6 after hardware reset. NICE will
read 30B6H or 20BGH (30 or 20 for DLCR7 and B6 for
DLCR6); EtherStar will read 0000H.
Power-down mode saves power when the device is not
in use. When ready to place the NICE chip in Power
Down Mode, first write 1 to DLCR6<7>, DLC EN, to
turn the receiver and transmitter off, then write 0 to
DLCR7<5>, PWRDN. To exit the power-down mode,
write 1 to PWRDN. Register contents will be preserved,
unless a hardware reset is issued. Hardware reset will also
terminate the power-down mode.
Byte order control provided by the Most..Least/
Least..Most bit, DLCR7<0>, provides compatibility
with various higher-level protocols, such as TCP/IP and
XNS. These protocols may have different transmission
order of the bytes within a word. When M..L/L..M is low,
the least significant byte of the word is transmitted first,
followed by the most significant. When M..L/L..M is set
high, the byte order is reversed. This feature applies only
when the system bus is operated in 16-bit (word) mode.
The byte order control works by reversing or not
reversing the bytes of all words as they pass between the
buffer memory and the system bus. Thus all data stored in
the transmit buffer or retrieved from the receive buffer is
affected, including the nontransmitted headers. The
NICE registers, other than the Buffer Memory Port,
BMPR8:9, are not affected by this control bit. Care must
be taken in the software driver code to reverse the header
information as well as the packet data when using this
feature. Examples follow.
Example of using Least..Most
Byte Ordering:
System Bus
Transmit Packet:
High Byte
TX Length, high byte
Destination Addr, 2nd byte
Source Addr, 2nd byte
Length Field, low byte*
Data Field, 2nd byte
Low Byte
TX Length, low byte
Destination Addr, 1st
byte
Source Addr, 1st byte
Length Field, high byte*
Data Field, 1st byte
Receive Packet:
High Byte
Unused; reserved
RX Length, high byte
Destination Addr, 2nd byte
Source Addr, 2nd byte
Length Field, low byte*
Data Field, 2nd byte
Low Byte
Receive Packet Status
RX Length, low byte
Destination Addr, 1st
byte
Source Addr, 1st byte
Length Field, high byte*
Data Field, 1st byte
Example of using Most..Least
Byte Ordering:
System Bus
Transmit Packet:
High Byte
TX Length, low byte *
Destination Addr, 1st byte
Source Addr, 1st byte
Length Field, high byte
Data Field, 1st byte
Low Byte
TX Length, high byte*
Destination Addr, 2nd
byte
Source Addr, 2nd byte
Length Field, low byte
Data Field, 2nd byte
Receive Packet:
High Byte
Receive Packet Status
RX Length, low byte *
Destination Addr, 1st byte
Source Addr, 1st byte
Length Field, high byte
Data Field, 1st byte
Low Byte
Unused; reserved
RX Length, high byte*
Destination Addr, 2nd
byte
Source Addr, 2nd byte
Length Field, low byte
Data Field, 2nd byte
Note: Asterisk indicates numerically reversed byte
ordering.

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