MAX5024 Просмотр технического описания (PDF) - Maxim Integrated

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MAX5024

65V, Low-Quiescent-Current, High-Voltage Linear Regulators with µP Reset and Watchdog Timer

Maxim Integrated 

65V, Low-Quiescent-Current, High-Voltage Linear

Regulators with µP Reset and Watchdog Timer

ELECTRICAL CHARACTERISTICS (continued)

(VIN = +14V, IOUT = 1mA, CIN = 10µF, COUT = 15µF, VEN = +2.4V, HOLD = open, 10kΩ from RESET to OUT, TA = -40°C to +125°C,

unless otherwise noted. Typical specifications are at TA = +25°C.) (Note 1)

PARAMETER

Load Regulation

Power-Supply Rejection Ratio

Short-Circuit Current

Thermal-Shutdown

Temperature

Thermal-Shutdown Hysteresis

RESET CIRCUIT

Reset Threshold

Reset Timeout Period

VOUT to Reset Delay

Open-Drain RESET Output

Voltage (Note 4)

SYMBOL

∆VOUT/

∆IOUT

PSRR

ISC

CONDITIONS

IOUT = 1mA to 150mA

IOUT = 10mA, f = 100Hz, 500mVP-P,

VOUT = +5V

VIN = +8V

TJ(SHDN)

∆TJ(SHDN)

MAX502_L, SET = GND

MAX502_M, SET = GND

MAX502_T, SET = GND

MAX502_S, SET = GND

VTH

MAX5024L/T, SET = Divider

(Figure 1) (Note 3)

MAX5024M/S, SET = Divider

(Figure 1) (Note 3)

tRP

tRD

VOUT falling

VOUT ≥ +1.0V, ISINK = 50µA,

RESET asserted

VOL

VOUT ≥ +2.85V, ISINK = 1.2mA,

RESET asserted

MIN

TYP

MAX UNITS

1

mV/mA

54

dB

175

300

mA

150

°C

20

°C

4.50 4.625 4.75

4.25 4.375 4.50

2.970 3.052 3.135

2.805 2.887 2.970

V

0.925 x

VOUT

0.875 x

VOUT

140

200

260

ms

5

µs

0.3

0.3

V

Open-Drain RESET Output-

Leakage Current

WATCHDOG FUNCTION

Watchdog Timeout Period

WDI Pulse Width

WDI Input Voltage

WDI Input Current

ILKG

VOUT ≥ +4.25V, ISINK = 3.2mA,

RESET asserted

RESET not asserted, VRESET = +11V

tWD

tWDI

VIL

VIH

IWDI

(Note 5)

WDI = GND

0.4

1.0

µA

1.12

1.6

2.08

s

50

ns

0.4

V

2.4

-1

+1

µA

Note 1: Limits at -40°C are guaranteed by characterization and not production tested.

Note 2: Dropout voltage is defined as VIN - VOUT when VOUT is 100mV below the value of VOUT for VIN = VOUT + 3V.

Note 3: VOUT = VSET (1 + R1 / R2) = 1.248V (1 + R1 / R2).

Note 4: RESET is guaranteed to be in the correct logic state for VOUT > +1V.

Note 5: Guaranteed by design, not production tested.

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