LC75725E
BLK and the Display Control
Since the LSI internal data (D1 to D473 and the control data) is undefined when power is first applied, the display is off
(S1 to S43 and G1 to G11 pins = VFL level) by setting the BLK pin low at the same time as power is applied.
Then, meaningless display at power on can be prevented by transfering the necessary serial data from the controller while
the display is off and set the BLK pin high after the transfer completes. (See Figure 3.)
Power Supply Sequence
The following sequences must be observed when the power is turned on and off. (See Figure 3.)
• Power on : Logic block power supply (VDD) on → Driver block power supply (VFL) on
• Power off : Driver block power supply (VFL) off → Logic block power supply (VDD) off
Figure 3
No. 5606-12/13