M80C186XL10 Просмотр технического описания (PDF) - Intel
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M80C186XL10 Datasheet PDF : 44 Pages
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M80C186XL
INSTRUCTION SET SUMMARY (Continued)
Function
Format
PROCESSOR CONTROL
CLC e Clear carry
11111000
CMC e Complement carry
11110101
STC e Set carry
11111001
CLD e Clear direction
11111100
STD e Set direction
11111101
CLI e Clear interrupt
11111010
STI e Set interrupt
11111011
HLT e Halt
11110100
WAIT e Wait
10011011
LOCK e Bus lock prefix
11110000
NOP e No Operation
10010000
(TTT LLL are opcode to processor extension)
Shaded areas indicate instructions not available in 8086 8088 microsystems
Clock Comments
Cycles
2
2
2
2
2
2
2
2
6
if TEST e 0
2
3
FOOTNOTES
The Effective Address (EA) of the memory operand
is computed according to the mod and r m fields
if mod e 11 then r m is treated as a REG field
if mod e 00 then DISP e 0 disp-low and disp-
high are absent
if mod e 01 then DISP e disp-low sign-ex-
tended to 16-bits disp-high is absent
if mod e 10 then DISP e disp-high disp-low
if r m e 000 then EA e (BX) a (SI) a DISP
if r m e 001 then EA e (BX) a (DI) a DISP
if r m e 010 then EA e (BP) a (SI) a DISP
if r m e 011 then EA e (BP) a (DI) a DISP
if r m e 100 then EA e (SI) a DISP
if r m e 101 then EA e (DI) a DISP
if r m e 110 then EA e (BP) a DISP
if r m e 111 then EA e (BX) a DISP
DISP follows 2nd byte of instruction (before data if
required)
reg is assigned according to the following
Segment
reg
Register
00
ES
01
CS
10
SS
11
DS
REG is assigned according to the following table
16-Bit (w e 1) 8-Bit (w e 0)
000 AX
000 AL
001 CX
001 CL
010 DX
010 DL
011 BX
011 BL
100 SP
100 AH
101 BP
101 CH
110 SI
110 DH
111 DI
111 BH
except if mod e 00 and r m e 110 then EA e
disp-high disp-low
EA calculation time is 4 clock cycles for all modes
and is included in the execution times given whenev-
er appropriate
The physical addresses of all operands addressed
by the BP register are computed using the SS seg-
ment register The physical addresses of the desti-
nation operands of the string primitive operations
(those addressed by the DI register) are computed
using the ES segment which may not be overridden
Segment Override Prefix
0 0 1 reg 1 1 0
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