M80C186XL20 Просмотр технического описания (PDF) - Intel

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M80C186XL20

16-BIT HIGH-INTEGRATION EMBEDDED PROCESSOR

Intel 

M80C186XL

M80C186XL EXECUTION TIMINGS

A determination of M80C186XL program execution

timing must consider the bus cycles necessary to

prefetch instructions as well as the number of exe-

cution unit cycles necessary to execute instructions

The following instruction timings represent the mini-

mum execution time in clock cycles for each instruc-

tion The timings given are based on the following

assumptions

 The opcode along with any data or displacement

required for execution of a particular instruction

has been prefetched and resides in the queue at

the time it is needed

 No wait states or bus HOLDs occur

 All word-data is located on even-address bound-

aries

All jumps and calls include the time required to fetch

the opcode of the next instruction at the destination

address

All instructions which involve memory accesses can

require one or two additional clocks above the mini-

mum timings shown due to the asynchronous hand-

shake between the bus interface unit (BIU) and exe-

cution unit

With a 16-bit BIU the M80C186XL has sufficient bus

performance to ensure that an adequate number of

prefetched bytes will reside in the queue most of the

time Therefore actual program execution time will

not be substantially greater than that derived from

adding the instruction timings shown

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