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M80C186XL16 Просмотр технического описания (PDF) - Intel

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M80C186XL16 Datasheet PDF : 44 Pages
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M80C186XL
AC CHARACTERISTICS
MAJOR CYCLE TIMINGS (WRITE CYCLE)
TC e b55 C to a125 C VCC e 5V g10%
All timings are measured at 1 5V and 100 pF loading on CLKOUT unless otherwise noted
All output test conditions are with CL e 50 pF
For AC tests input VIL e 0 45V and VIH e 2 4V except at X1 where VIH e VCC b 0 5V
Values
Symbol
Parameter
M80C186XL
M80C186XL12 Unit
Min
Max
Min
Max
M80C186XL GENERAL TIMING RESPONSES (Listed More Than Once)
TCHSV
TCLSH
TCLAV
TCLAX
TCLDV
TCHDX
TCHLH
TLHLL
TCHLL
TAVLL
Status Active Delay
Status Inactive Delay
Address Valid Delay
Address Hold
Data Valid Delay
Status Hold Time
ALE Active Delay
ALE Width
ALE Inactive Delay
Address Valid to ALE Low
3
45
3
35 ns
3
46
3
35 ns
3
44
3
36 ns
0
0
ns
3
40
3
36 ns
10
10
ns
30
25 ns
TCLCL b 15
TCLCL b 15
ns
30
25 ns
TCLCH b 18
TCLCH b 15
ns
TLLAX Address Hold from ALE
TCHCL b 15
TCHCL b 15
ns
Inactive
TAVCH Address Valid to Clock High
0
0
ns
TCLDOX Data Hold Time
3
3
ns
TCVCTV Control Active Delay 1
3
44
3
37 ns
TCVCTX Control Inactive Delay
3
44
3
37 ns
TCLCSV Chip-Select Active Delay
3
42
3
33 ns
TCXCSX Chip-Select Hold from
TCLCH b 10
TCLCH b 10
ns
Command Inactive
TCHCSX Chip-Select Inactive Delay
TDXDL DEN Inactive to DT R Low
3
35
3
30 ns
0
0
ns
TCLLV LOCK Valid Invalid Delay
3
40
3
37 ns
M80C186XL TIMING RESPONSES (Write Cycle)
TWLWH WR Pulse Width
2TCLCL b 30
2TCLCL b 25
ns
TWHLH WR Inactive to ALE High
TCLCH b 14
TCLCH b 14
ns
TWHDX Data Hold after WR
TCLCL b 34
TCLCL b 20
ns
TWHDEX WR Inactive to DEN Inactive TCLCH b 10
TCLCH b 10
ns
Test
Conditions
Equal
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Equal
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Equal
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Equal
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Equal
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Equal
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18

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