Sample Application Circuit 3
1/3 bias (for use with normal panels)
LC75863E, 75863W
+5 V
*8
+5.5 V
C ≥ 0.047 µF
CC
From the
controller
To the controller
To the controller
power supply
*9
VDD
VSS
TEST
VLCD
VLCD1
VLCD2
OSC
COM1
COM2
COM3
P1/S1
P2/S2
P3/S3
P4/S4
S5
S S S23
22
CE
54
CL
//
DI K K K K K
DO
IIIII
54321
KKKKKK
SSSSSS
654321
(general-purpose
(P1) output ports)
(P2)
Used with the
(P3)
backlight controller
(P4)
or other circuit.
(S24)
(S25)
Key matrix
(up to 30 keys)
Note: *8.
*9.
Add a capacitor to the logic block power supply line so that the logic block power supply voltage VDD rise time when power is applied and the
logic block power supply voltage VDD fall time when power drops are both at least 1 ms, as the LC75863E/W is reset by the VDET.
The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between 1 to 10 kΩ) appropriate for the capacitance of
the external wiring so that signal waveforms are not degraded.
No. 7135-20/24