A29400 Просмотр технического описания (PDF) - AMIC Technology

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производитель

A29400

512K X 8 Bit / 256K X 16 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory

AMIC Technology 

A29400 Series

Table 5. A29400 Command Definitions

Command

Sequence

(Note 1)

Read (Note 6)

Reset (Note 7)

Manufacturer ID

Device ID,

Top Boot Block

Device ID,

Bottom Boot Block

1

1

Word

Byte 4

Word

Byte 4

Word

Byte 4

Continuation ID

Word 4

Byte

Word

Sector Protect Verify

(Note 9)

4

Byte

Program

Chip Erase

Sector Erase

Erase Suspend (Note 9)

Erase Resume (Note 10)

Word

Byte 4

Word

Byte 6

Word

Byte 6

1

1

First

Second

Addr Data Addr Data

RA RD

XXX F0

555

AAA AA

555

AA

AAA

2AA

55

555

2AA

55

555

555 AA 2AA 55

AAA

555

555 AA

AAA

2AA 55

555

555

2AA

AA

AAA

55

555

555

AAA AA

555

AA

AAA

555

AAA AA

XXX B0

XXX 30

2AA

555 55

2AA

55

555

2AA

555 55

Bus Cycles (Notes 2 - 5)

Third

Fourth

Fifth

Sixth

Addr Data Addr Data Addr Data Addr Data

555

90

AAA

555

90

AAA

555 90

X00 37

X01 B3B0

X02 B0

X01 B331

AAA

X02 31

555 90 X03 7F

AAA

X06

555

90

AAA

(SA) XX00

X02 XX01

(SA) 00

X04 01

555

A0 PA PD

AAA

555

80

AAA

555

AA

AAA

2AA

55

555

555

555

2AA

80

AA

55

AAA

AAA

555

555

10

AAA

SA 30

Legend:

X = Don't care

RA = Address of the memory location to be read.

RD = Data read from location RA during read operation.

PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE or CE pulse,

whichever happens later.

PD = Data to be programmed at location PA. Data latches on the rising edge of WE or CE pulse, whichever happens first.

SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A17 - A12 select a unique sector.

Note:

1. See Table 1 for description of bus operations.

2. All values are in hexadecimal.

3. Except when reading array or autoselect data, all bus cycles are write operation.

4. Address bits A17 - A11 are don't cares for unlock and command cycles, unless SA or PA required.

5. No unlock or command cycles required when reading array data.

6. The Reset command is required to return to reading array data when device is in the autoselect mode, or if I/O5 goes high

(while the device is providing status data).

7. The fourth cycle of the autoselect command sequence is a read cycle.

8. The data is 00h for an unprotected sector and 01h for a protected sector. See "Autoselect Command Sequence" for more information.

9. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode.

10. The Erase Resume command is valid only during the Erase Suspend mode.

11. The time between each command cycle has to be less than 50µs.

PRELIMINARY (February, 2001, Version 0.1)

12

AMIC Technology, Inc.

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