M25P128 Просмотр технического описания (PDF) - STMicroelectronics

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производитель

M25P128

128 Mbit (Multilevel), low-voltage, Serial Flash memory with 50-MHz SPI bus interface

STMicroelectronics 

Instructions

M25P128

6.1

Write Enable (WREN)

The Write Enable (WREN) instruction (Figure 8) sets the Write Enable Latch (WEL) bit.

The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector

Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction.

The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the

instruction code, and then driving Chip Select (S) High.

Figure 8. Write Enable (WREN) instruction sequence

S

01234567

C

Instruction

D

High Impedance

Q

AI02281E

6.2

Write Disable (WRDI)

The Write Disable (WRDI) instruction (Figure 9) resets the Write Enable Latch (WEL) bit.

The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the

instruction code, and then driving Chip Select (S) High.

The Write Enable Latch (WEL) bit is reset under the following conditions:

● Power-up

● Write Disable (WRDI) instruction completion

● Write Status Register (WRSR) instruction completion

● Page Program (PP) instruction completion

● Sector Erase (SE) instruction completion

● Bulk Erase (BE) instruction completion

Figure 9. Write Disable (WRDI) instruction sequence

S

01234567

C

Instruction

D

High Impedance

Q

AI03750D

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