LTM4609V Просмотр технического описания (PDF) - Linear Technology

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LTM4609V

36VIN, 34VOUT High Efficiency Buck-Boost DC/DC µModule Regulator

Linear Technology 

LTM4609

Applications Information

Layout Checklist/Example

The high integration of LTM4609 makes the PCB board

layout very simple and easy. However, to optimize its electri-

cal and thermal performance, some layout considerations

are still necessary.

• Use large PCB copper areas for high current path, includ-

ing VIN, RSENSE, SW1, SW2, PGND and VOUT. It helps to

minimize the PCB conduction loss and thermal stress.

• Place high frequency input and output ceramic capaci-

tors next to the VIN, PGND and VOUT pins to minimize

high frequency noise

• Route SENSE– and SENSE+ leads together with minimum

PC trace spacing. Avoid sense lines passing through

noisy areas, such as switch nodes.

• Place a dedicated power ground layer underneath the

unit.

• To minimize the via conduction loss and reduce module

thermal stress, use multiple vias for interconnection

between the top layer and other power layers

• Do not put vias directly on pads, unless the vias are

capped.

• Use a separated SGND ground copper area for com-

ponents connected to signal pins. Connect the SGND

to PGND underneath the unit.

Figure 15. gives a good example of the recommended

layout.

SW1

SW2 VIN

L1

VOUT

COUT

RSENSE

CIN

PGND

+ – SGND

RSENSE

KELVIN CONNECTIONS TO RSENSE

PGND

4609 F15

Figure 15. Recommended PCB Layout

(LGA Shown, for BGA Use Circle Pads)

4609ff

20

For more information www.linear.com/LTM4609

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