LTM4606(RevB) Просмотр технического описания (PDF) - Linear Technology
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LTM4606 Datasheet PDF : 28 Pages
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LTM4606
Applications Information
Table 3. 1.5V Output
DERATING CURVE
Figures 8, 10
Figures 8, 10
Figures 8, 10
Figures 9, 11
Figures 9, 11
Figures 9, 11
VIN (V)
5, 12
5, 12
5, 12
5, 12
5, 12
5, 12
POWER LOSS CURVE
Figure 6
Figure 6
Figure 6
Figure 6
Figure 6
Figure 6
Table 4. 3.3V Output
DERATING CURVE
Figures 12, 14
Figures 12, 14
Figures 12, 14
Figures 13, 15
Figures 13, 15
Figures 13, 15
VIN (V)
12, 24
12, 24
12, 24
12, 24
12, 24
12, 24
POWER LOSS CURVE
Figure 7
Figure 7
Figure 7
Figure 7
Figure 7
Figure 7
Heat Sink Manufacturer
Wakefield Engineering
Part No: LTN20069
AIR FLOW (LFM)
0
200
400
0
200
400
HEAT SINK
None
None
None
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
AIR FLOW (LFM)
0
200
400
0
200
400
HEAT SINK
None
None
None
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
Phone: 603-635-2800
θJA (°C/W)
13.5
10
9
9.5
7
5
θJA (°C/W)
13.5
11
10
10
7
5
Layout Checklist/Example
The high integration of LTM4606 makes the PCB board
layout very simple and easy. However, to optimize its
electrical and thermal performance, some layout con-
siderations are still necessary.
• Use large PCB copper areas for high current path, in-
cluding VIN, PGND and VOUT. It helps to minimize the
PCB conduction loss and thermal stress.
• Place high frequency ceramic input and output capaci-
tors next to the VD, PGND and VOUT pins to minimize
high frequency noise.
• Place a dedicated power ground layer underneath the
unit.
• Use round corners for the PCB copper layer to minimize
the radiated noise.
• To minimize the EMI noise and reduce module thermal
stress, use multiple vias for interconnection between
top layer and other power layers on different locations.
• Do not put vias directly on pads, unless they are capped.
• Use a separated SGND ground copper area for com-
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
• Place one or more high frequency ceramic capacitors
close to the connection into the system board.
Figure 17 gives a good example of the recommended
layout. For load current below 3A, decouple the input and
output grounds. Use vias to connect GND pads to the
bottom layer, then connect to the right side of the module
as the output GND.
VIN
CIN CIN
GND
SIGNAL
GND
COUT
VOUT
COUT
4606 F17
Figure 17. Recommended PCB Layout
4606fb
19
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