LTC3611 Просмотр технического описания (PDF) - Linear Technology
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LTC3611 Datasheet PDF : 24 Pages
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LTC3611
APPLICATIONS INFORMATION
4. CINloss.Theinputcapacitorhasthedifficultjoboffiltering
the large RMS input current to the regulator. It must have
a very low ESR to minimize the AC I2R loss and sufficient
capacitance to prevent the RMS current from causing ad-
ditional upstream losses in fuses or batteries.
Other losses, including COUT ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If
you make a change and the input current decreases, then
the efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or dis-
charge COUT generating a feedback error signal used by the
regulator to return VOUT to its steady-state value. During
this recovery time, VOUT can be monitored for overshoot
or ringing that would indicate a stability problem. The ITH
pin external components shown in Figure 6 will provide
adequate compensation for most applications. For a
detailed explanation of switching control loop theory see
Application Note 76.
Design Example
As a design example, take a supply with the following
specifications: VIN = 5V to 36V (12V nominal), VOUT =
2.5V ±5%, IOUT(MAX) = 10A, f = 550kHz. First, calculate
the timing resistor with VON = VOUT:
RON
=
2.5V
(2.4)(550kHz)
(10pF
)
=
187k
and choose the inductor for about 40% ripple current at
the maximum VIN:
L
=
2.5V
(550kHz)(0.4)(10A
)
1
2.5V
36V
=
1μH
Selecting a standard value of 1μH results in a maximum
ripple current of:
IL
=
2.5V
(550kHz)(1μH)
1–
2.5V
12V
=
3.6A
Next, set up VRNG voltage and check the ILIMIT. Tying
VRNG to 1V will set the typical current limit to 15A, and
tying VRNG to GND will result in a typical current around
10A. CIN is chosen for an RMS current rating of about 5A
at 85°C. The output capacitors are chosen for a low ESR
of 0.013Ω to minimize output voltage changes due to
inductor ripple current and load steps. The ripple voltage
will be only:
ΔVOUT(RIPPLE) = ΔIL(MAX) (ESR)
= (3.6A) (0.013Ω) = 47mV
However, a 0A to 10A load step will cause an output
change of up to:
ΔVOUT(STEP) = ΔILOAD (ESR) = (10A) (0.013Ω) =130mV
An optional 22μF ceramic output capacitor is included
to minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 6.
PC Board Layout Checklist
When laying out a PC board follow one of the two sug-
gested approaches. The simple PC board layout requires
a dedicated ground plane layer. Also, for higher currents,
a multilayer board is recommended to help with heat
sinking of power components.
• The ground plane layer should not have any traces and
it should be as close as possible to the layer with the
LTC3611.
• Place CIN and COUT all in one compact area, close to
the LTC3611. It may help to have some components
on the bottom side of the board.
• Keep small-signal components close to the LTC3611.
• Ground connections (including LTC3611 SGND and
PGND) should be made through immediate vias to
the ground plane. Use several larger vias for power
components.
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