LTC3609IWKG-TRPBF(RevB) Просмотр технического описания (PDF) - Linear Technology

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производитель

LTC3609IWKG-TRPBF
(Rev.:RevB)

32V, 6A Monolithic Synchronous Step-Down DC/DC Converter

Linear Technology 

LTC3609

Applications Information

Design Example

As a design example, take a supply with the following

specifications: VIN = 5V to 32V (12V nominal), VOUT =

2.5V ± 5%, IOUT(MAX) = 6A, f = 550kHz. First, calculate the

timing resistor with VON = VOUT:

RON

=

(2.4V

2.5V

)(550kHz

)(10pF)

=

187k

Next, set up VRNG voltage and check the ILIMIT. Tying VRNG

to GND will set the typical current limit to 9A, and tying

VRNG to 1.2V will result in a typical current around 14A.

CIN is chosen for an RMS current rating of about 5A at

85°C. The ceramic output capacitors are chosen for an

ESR of 0.002Ω to minimize output voltage changes due

to inductor ripple current and load steps. The ripple volt-

age is:

and choose the inductor for about 40% ripple current at

the maximum VIN:

L

=

2.5V

(550kHz ) (0.4)

(6A)

1−



2.5V

32V







=

1.8µH

∆VOUT(RIPPLE) = ∆IL(MAX) (ESR)

= (2.4A) (0.002Ω) = 4.8mV

and a 0A to 6A load step will only cause an output

change of:

Selecting a standard value of 1.5µH results in a maximum

ripple current of:

ΔIL

=

2.5V

(550kHz ) (1.5µH)

1–



2.5V

12V







=

2.4A

∆VOUT(STEP) = ∆ILOAD (ESR) = (6A) (0.002Ω) = 12mV

An optional 22µF ceramic output capacitor is included

to minimize the effect of ESL in the output ripple. The

complete circuit is shown in Figure 6.

INTVCC

CVCC

4.7µF

6.3V

VIN

CF

RF1

0.1µF 1Ω

50V

EXTVCC

C4

0.01µF

SW

GND

40 39 38 37 36 35 34 33 32 31 30 29 28 27

VOUT

2.5V AT

6A

COUT1 +

100µF

x2

GND

L1

1.2µH

VIN

VIN

5V TO 32V

CIN

4.7µF

50V

x2

41 SW

42 SW

43 SW

44 SW

45 SW

46 SW

47 SW

48 PVIN

49 PVIN

50 PVIN

51 PVIN

52 PVIN

LTC3609

SGND 26

NC 25

NC 24

VFB 23

ION 22

NC 21

SGND 20

FCB 19

ITH 18

VRNG 17

PGOOD 16

SGND 15

R1

9.53k

1%

R2

30.1k

1%

VOUT

RON

187k

1%

VIN

R5

CC1

1000pF

15.8k

INTVCC

JP1

RPG1

100k

CC2

100pF

18

1 2 3 4 5 6 7 8 9 10 11 12 13 14

SW

2Ω

PGOOD

SGND

CIN: MURATA GRM32ER71H475K

COUT: MURATA GRM435R60J107M

LI: CDEP851R2MC-50

KEEP POWER GROUND AND SIGNAL

GROUND SEPARATE. CONNECT AT

ONE POINT.

INTVCC

DB

CMDSH-3

CB1

0.22µF

SW

CSS

0.1µF

CVON

0.1µF

VOUT

Figure 6. Design Example: 5V to 32V Input to 2.5V/6A at 550kHz

INTVCC

3609 F06

3609fb

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