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LT3844EFE-PBF

High Voltage, Current Mode Switching Regulator Controller with Programmable Operating Frequency

Linear Technology 

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OPERATIO (Refer to Functional Diagram)

To eliminate the possibility of shoot through between the

MOSFET and the internal SW pull-down switch, an adap-

tive nonoverlap circuit ensures that the internal pull-down

switch does not turn on until the gate of the MOSFET is

below its turn on threshold.

Low Current Operation (Burst Mode Operation)

To increase low current load efficiency, the LT3844 is

capable of operating in Linear Technology’s proprietary

Burst Mode operation where the external MOSFET oper-

ates intermittently based on load current demand. The

Burst Mode function is disabled by connecting the

BURST_EN pin to VCC or VFB and enabled by connecting

the pin to SGND.

When the required switch current, sensed via the VC pin

voltage, is below 15% of maximum, Burst Mode operation

is employed and that level of sense current is latched onto

the IC control path. If the output load requires less than

this latched current level, the converter will overdrive the

output slightly during each switch cycle. This overdrive

condition is sensed internally and forces the voltage on the

VC pin to continue to drop. When the voltage on VC drops

150mV below the 15% load level, switching is disabled,

and the LT3844 shuts down most of its internal circuitry,

reducing total quiescent current to 120μA. When the

converter output begins to fall, the VC pin voltage begins

to climb. When the voltage on the VC pin climbs back to the

15% load level, the IC returns to normal operation and

switching resumes. An internal clamp on the VC pin is set

at 100mV below the output disable threshold, which limits

the negative excursion of the pin voltage, minimizing the

converter output ripple during Burst Mode operation.

During Burst Mode operation, the VIN pin current is 20μA

and the VCC current is reduced to 100μA. If no external

drive is provided for VCC, all VCC bias currents originate

from the VIN pin, giving a total VIN current of 120μA. Burst

current can be reduced further when VCC is driven using an

output derived source, as the VCC component of VIN

current is then reduced by the converter duty cycle ratio.

LT3844

Start-Up

The following section describes the start-up of the supply

and operation down to 4V once the step-down supply is up

and running. For the protection of the LT3844 and the

switching supply, there are internal undervoltage lockout

(UVLO) circuits with hysteresis on VIN, VCC and VBOOST, as

shown in the Electrical Characteristics table. Start-up and

continuous operation require that all three of these

undervoltage lockout conditions be satisfied because the

TG MOSFET driver is disabled during any UVLO fault

condition. In startup, for most applications, VCC is pow-

ered from VIN through the high voltage linear regulator of

the LT3844. This requires VIN to be high enough to drive

the VCC voltage above its undervoltage lockout threshold.

VCC, in turn, has to be high enough to charge the BOOST

capacitor through an external diode so that the BOOST

voltage is above its undervoltage lockout threshold. There

is an NPN switch that pulls the SW node to ground each

cycle during the TG power MOSFET off-time, ensuring the

BOOST capacitor is kept fully charged. Once the supply is

up and running, the output voltage of the supply can

backdrive VCC through an external diode. Internal circuitry

disables the high voltage regulator to conserve VIN supply

current. Output voltages that are too low or too high to

backdrive VCC require additional circuitry such as a voltage

doubler or linear regulator. Once VCC is backdriven from a

supply other than VIN, VIN can be reduced to 4V with

normal operation maintained.

Soft-Start

The soft-start function controls the slew rate of the power

supply output voltage during start-up. A controlled output

voltage ramp minimizes output voltage overshoot, re-

duces inrush current from the VIN supply, and facilitates

supply sequencing. A capacitor, CSS, connected from the

CSS pin to SGND, programs the slew rate. The capacitor is

charged from an internal 2μA current source producing a

ramped voltage. The capacitor voltage overrides the inter-

nal reference to the error amplifier. If the VFB pin voltage

3844fa

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