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LQFP144

32-bit ARM Cortex-M3 MCU; up to 200 kB SRAM; Ethernet, two High-speed USB, LCD, and external memory controller

NXP Semiconductors. 

NXP Semiconductors

LPC1850/30/20/10

32-bit ARM Cortex-M3 microcontroller

Table 3. Pin description …continued

LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.

Symbol

Description

P2_12

P2_13

P3_0

E15 D13 B9 153 106 [2] N; PU I/O GPIO1[12] — General purpose digital input/output pin.

O CTOUT_4 — SCT output 4. Match output 3 of timer 3.

- R — Function reserved.

I/O EMC_A3 — External memory address line 3.

- R — Function reserved.

- R — Function reserved.

- R — Function reserved.

I/O U2_UCLK — Serial clock input/output for USART2 in

synchronous mode.

C16 E14 A10 156 108 [2] N; PU I/O GPIO1[13] — General purpose digital input/output pin.

I CTIN_4 — SCT input 4. Capture input 2 of timer 1.

- R — Function reserved.

I/O EMC_A4 — External memory address line 4.

- R — Function reserved.

- R — Function reserved.

- R — Function reserved.

I/O U2_DIR — RS-485/EIA-485 output enable/direction

control for USART2.

F13 D12 A8 161 112 [2] N; PU I/O I2S0_RX_SCK — I2S receive clock. It is driven by the

master and received by the slave. Corresponds to the

signal SCK in the I2S-bus specification.

O I2S0_RX_MCLK — I2S receive master clock.

I/O I2S0_TX_SCK — Transmit Clock. It is driven by the

master and received by the slave. Corresponds to the

signal SCK in the I2S-bus specification.

O I2S0_TX_MCLK — I2S transmit master clock.

I/O SSP0_SCK — Serial clock for SSP0.

- R — Function reserved.

- R — Function reserved.

- R — Function reserved.

LPC1850_30_20_10

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 6.1 — 7 February 2013

© NXP B.V. 2013. All rights reserved.

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