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LQFP144 Просмотр технического описания (PDF) - NXP Semiconductors.

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LQFP144 Datasheet PDF : 149 Pages
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NXP Semiconductors
LPC1850/30/20/10
32-bit ARM Cortex-M3 microcontroller
Table 3. Pin description …continued
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.
Symbol
Description
P2_8
P2_9
P2_10
P2_11
J16 H14 C6 140 98 [2] N; PU - R — Function reserved. Boot pin (see Table 5)
O CTOUT_0 — SCT output 0. Match output 0 of timer 0.
I/O U3_DIR — RS-485/EIA-485 output enable/direction
control for USART3.
I/O EMC_A8 — External memory address line 8.
I/O GPIO5[7] — General purpose digital input/output pin.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
H16 G14 B10 144 102 [2] N; PU I/O GPIO1[10] — General purpose digital input/output pin.
Boot pin (see Table 5).
O CTOUT_3 — SCT output 3. Match output 3 of
timer 0.
I/O U3_BAUD — Baud pin for USART3.
I/O EMC_A0 — External memory address line 0.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
G16 F14 E8 146 104 [2] N; PU I/O GPIO0[14] — General purpose digital input/output pin.
O CTOUT_2 — SCT output 2. Match output 2 of
timer 0.
O U2_TXD — Transmitter output for USART2.
I/O EMC_A1 — External memory address line 1.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
F16 E13 A9 148 105 [2] N; PU I/O GPIO1[11] — General purpose digital input/output pin.
O CTOUT_5 — SCT output 5. Match output 3 of timer 3.
I U2_RXD — Receiver input for USART2.
I/O EMC_A2 — External memory address line 2.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
- R — Function reserved.
LPC1850_30_20_10
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6.1 — 7 February 2013
© NXP B.V. 2013. All rights reserved.
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