LQFP64 Просмотр технического описания (PDF) - STMicroelectronics
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LQFP64 Datasheet PDF : 79 Pages
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STM32F101x4
STM32F101x6
Low-density access line, ARM-based 32-bit MCU with
16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces
Features
■ Core: ARM 32-bit Cortex™-M3 CPU
– 36 MHz maximum frequency,
1.25 DMIPS/MHz (Dhrystone 2.1)
performance at 0 wait state memory
access
– Single-cycle multiplication and hardware
division
■ Memories
– 16 to 32 Kbytes of Flash memory
– 4 to 6 Kbytes of SRAM
■ Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR and programmable voltage
detector (PVD)
– 4-to-16 MHz crystal oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 40 kHz RC
– PLL for CPU clock
– 32 kHz oscillator for RTC with calibration
■ Low power
– Sleep, Stop and Standby modes
– VBAT supply for RTC and backup registers
■ Debug mode
– Serial wire debug (SWD) and JTAG
interfaces
■ DMA
– 7-channel DMA controller
– Peripherals supported: timers, ADC, SPIs,
I2Cs and USARTs
■ 1 × 12-bit, 1 µs A/D converter (up to 16
channels)
– Conversion range: 0 to 3.6 V
– Temperature sensor
■ Up to 51 fast I/O ports
– 26/37/51 I/Os, all mappable on 16 external
interrupt vectors and almost all 5 V-tolerant
LQFP64
10 x 10 mm
LQFP48
7 x 7 mm
VFQFPN48 VFQFPN36
7 × 7 mm
6 × 6 mm
■ Up to 5 timers
– Up to two16-bit timers, each with up to 4
IC/OC/PWM or pulse counter
– 2 watchdog timers (Independent and
Window)
– SysTick timer: 24-bit downcounter
■ Up to 4 communication interfaces
– 1 x I2C interface (SMBus/PMBus)
– Up to 2 USARTs (ISO 7816 interface, LIN,
IrDA capability, modem control)
– 1 × SPI (18 Mbit/s)
■ CRC calculation unit, 96-bit unique ID
■ ECOPACK® packages
Table 1. Device summary
Reference
Part number
STM32F101x4
STM32F101x6
STM32F101C4,
STM32F101R4,
STM32F101T4
STM32F101C6,
STM32F101R6,
STM32F101T6
April 2011
Doc ID 15058 Rev 5
1/79
www.st.com
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