LC75884E, LC75884W
For example, the table below lists the segment output states for the S11 output pin.
Display data
D41
D42
D43
D44
Output pin state (S11)
0
0
0
0
The LCD segments for COM1,COM2,COM3 and COM4 are off.
0
0
0
1
The LCD segment for COM4 is on.
0
0
1
0
The LCD segment for COM3 is on.
0
0
1
1
The LCD segments for COM3 and COM4 are on.
0
1
0
0
The LCD segment for COM2 is on.
0
1
0
1
The LCD segments for COM2 and COM4 are on.
0
1
1
0
The LCD segments for COM2 and COM3 are on.
0
1
1
1
The LCD segments for COM2,COM3 and COM4 are on.
1
0
0
0
The LCD segment for COM1 is on.
1
0
0
1
The LCD segments for COM1 and COM4 are on.
1
0
1
0
The LCD segments for COM1 and COM3 are on.
1
0
1
1
The LCD segments for COM1,COM3 and COM4 are on.
1
1
0
0
The LCD segments for COM1 and COM2 are on.
1
1
0
1
The LCD segments for COM1,COM2 and COM4 are on.
1
1
1
0
The LCD segments for COM1,COM2 and COM3 are on.
1
1
1
1
The LCD segments for COM1,COM2,COM3 and COM4 are on.
Serial Data Output
1. When CL is stopped at the low level
Note: B0 to B3, A0 to A3······CCB address
2. When CL is stopped at the high level
Note: B0 to B3, A0 to A3······CCB address
CCB address ...... 43H
KD1 to KD30........ Key data
SA........................ Sleep acknowledge data
Note: If a key data read operation is executed when DO is high, the read key data (KD1 to KD30) and sleep acknowledge data(SA) will be invalid.
No. 6086-12/27