LB11980H Просмотр технического описания (PDF) - SANYO -> Panasonic
Номер в каталоге
Компоненты Описание
производитель
LB11980H Datasheet PDF : 11 Pages
| |||
LB11980H
Electrical Characteristics at Ta = 25°C, VCC = 5V, VS = 15V
Parameter
Symbol
Conditions
VCC supply current
Output
ICC
RL = ∞, VCTL = 0, VLIM = 0V (Quiescent)
Output saturation voltage
Output leakage current
FR
VOsat1
VOsat2
IOleak
IO = 500mA, Rf = 0.5Ω, sink+source
VCTL = VLIM = 5V (With saturation prevention)
IO = 1.0A, Rf = 0.5Ω, sink+source
VCTL = VLIM = 5V (With saturation prevention)
FR pin input threshold voltage
VFSR
FR pin input input bias current
Ib (FSR) VFR = 3V
Control
CTL pin input Input bias current
Ib (CTL) VCTL = 5V
CTL pin input motor current
Imctl
VCTL = 0V
CTL pin control start voltage
CTL pin control Gm
Current limit
VCTL (ST)
Gm (CTL)
Rf = 0.5Ω, VLIM = 5V, IO ≥ 10mA
Hall input logic fixed (U, V, W = H, H, L)
Rf = 0.5Ω, ∆IO = 200mA
Hall input logic fixed (U, V, W = H, H, L)
LIM pin input current
Ilim
VLIM = 3V
LIM pin motor current
Imlim
VLIM = 0V
LIM current limit offset voltage
LIM pin control Gm
Hall amplifier
Voff (LIM)
Gm (lim)
Rf = 0.5Ω, VCTL = 5V, IO ≥ 10mA
Hall input logic fixed (U, V, W = H, H, L)
Rf = 0.5Ω, VCTL = 5V
Hall input logic fixed (U, V, W = H, H, L)
Hall amplifier input offset voltage
Hall amplifier input bias current
VOFF
(HALL)
Ib (HALL)
Hall amplifier common-mode
input voltage
TRC
VCM (HALL)
Torque ripple correction ratio
ADJ pin voltage
TRC
VADJ
For the high and low peaks in the Rf waveform when
IO = 200mA
(Rf = 0.5Ω, ADJ-OPEN) Note.2
FG Amplifier
FG amplifier input offset voltage
VOFF (FG)
FG amplifier input bias current
Ib (FG)
FG amplifier output saturation
voltage
FG amplifier voltage gain
VOsat (FG) Sink side; With internal pull-up resistance load
VG (FG) For open loop at f = 10kHz
FG amplifier common-mode input
voltage
Schmitt amplifier
VCM (FG)
Duty ratio
DUTY
Under specified conditions (RF = 39kΩ) Note 3
Upper side output saturation voltage
Lower side output saturation voltage
Hysteresis width
Vsatu (SH)
Vsatd (SH)
Vhys
IO = -20µA
IO = 100µA
FGS output pin pull-up resistance RFGout
Saturation
Saturation prevention circuit
lower set voltage
TSD
VO sat
(DET)
Voltage between each OUT and Rf with
IO = 10mA, Rf = 0.5Ω, VCTL = VLIM = 5V
TSD operating temperature
T-TSD
(Design target) Note.1
Note 1. No measurements are made on the parameters with Note (Design target).
Ratings
Unit
min
typ
max
12
18 mA
2.1
2.6 V
2.6
3.5 V
1.0 mA
1.0
1.25
100
150
2V
200 µA
1.5
3 µA
5 mA
2.25
2.50
2.75 V
0.86
1.06
1.26 A/V
1.5
1.0
1.25
3 µA
5 mA
1.5 V
0.59
0.71
0.83 A/V
-6
+6 mV
1.0
3.0 µA
1.3
3.3 V
13
%
2.37
-8
-100
41.5
0.5
2.50
0.5
44.5
2.63 V
+8 mV
nA
0.6 V
47.5 dB
4.0 V
49.0
4.8
32
0.175
50
51.0 %
V
0.2 V
46
60 mV
4.7
kΩ
0.25
0.325 V
180
°C
No.8798-2/11
Share Link: 