KS8993(2009) Просмотр технического описания (PDF) - Micrel

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производитель

KS8993
(Rev.:2009)

3-Port 10/100 Integrated Switch with PHY and Frame Buffer

Micrel 

KS8993

Micrel

MII Interface Operation

The MII (Media Independent Interface) operates in either a forward or reverse mode. In the forward mode, the KS8993 MII acts

like a MAC and in the reverse mode, it acts like a PHY device. This interface is specified by the IEEE 802.3 committee and

provides a common interface between physical layer and MAC layer devices. There are two distinct groups, one being for

transmission and the other for receiving. The table below describes the signals used in this interface in forward and reverse

modes.

This interface is a nibble wide data interface and therefore runs at 1/4 the network bit rate (not encoded). Additional signals

on the transmit side indicate when data is valid or when an error occurs during transmission. Likewise, the receive side has

indicators that convey when the data is valid and without physical layer errors.

For half-duplex operation there is a signal that indicates a collision has occurred during transmission.

Note that the signal MRXER is not provided on the MII interface for the KS8993 for reverse operation and MTXER is not

represented for forward mode. Normally this would indicate a receive / transmit error coming from the physical layer /MAC

device, but is not appropriate for this configuration. If the connecting device has a MRXER pin, this should be tied low on the

other device for reverse or if it has a MTXER pin in the forward mode it should also be tied low on the other device.

Reverse MII Mode Connection

External MAC

KS8993 Signal

MTXEN

MTXEN

MTXER

MTXER

MTXD3

MTXD[3]

MTXD2

MTXD[2]

MTXD1

MTXD[1]

MTXD0

MTXD[0]

MTXC

MTXCLK

MCOL

MCOL

MCRS

MCRS

MRXDV

MRXDV

MRXER

Not used

MRXD3

MRXD[3]

MRXD2

MRXD[2]

MRXD1

MRXD[1]

MRXD0

MRXD[0]

MRXC

MRXCLK

Description

Transmit enable

Transmit error

Transmit data bit 3

Transmit data bit 2

Transmit data bit 1

Transmit data bit 0

Transmit clock

Collision detection

Carrier sense

Receive data valid

Receive error

Receive data bit 3

Receive data bit 2

Receive data bit 1

Receive data bit 0

Receive clock

Forward MII Mode Connection

External PHY

KS8993 Signal

MTXEN

MRXDV

MTXER

Not used

MTXD3

MRXD[3]

MTXD2

MRXD[2]

MTXD1

MRXD[1]

MTXD0

MRXD[0]

MTXC

MTXCLK

MCOL

MCOLIN

MCRS

MCRS

MRXDV

MTXEN

MRXER

MTXER

MRXD3

MTXD[3]

MRXD2

MTXD[2]

MRXD1

MTXD[1]

MRXD0

MTXD[0]

MRXC

MRXCLK

Table 2. MII Interconnect

April 2009

21

KS8993

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