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ISL95873

Buck PWM Controller with Internal Compensation and External Reference Tracking

Intersil 

ISL95873

PHASE

DCR

L

IL

+

VDCR

_

ROCSET

CSEN

8.5µA

OCSET

+ VROCSET _

RO

VO

VO

CO

FIGURE 13. OVERCURRENT PROGRAMMING CIRCUIT

Figure 13 shows the overcurrent set circuit. The inductor consists

of inductance L and the DC resistance DCR. The inductor DC

current IL creates a voltage drop across DCR, which is given by

Equation 4:

VDCR = IL ⋅ DCR

(EQ. 4)

The IOCSET current source sinks 8.5µA into the OCSET pin,

creating a DC voltage drop across the resistor ROCSET, which is

given by Equation 5:

VROCSET = 8.5μA ⋅ ROCSET

(EQ. 5)

The DC voltage difference between the OCSET pin and the VO pin,

given by Equation 6:

VOCSET– VVO = VDCR– VROCSET =IL ⋅DCR – IOCSET⋅ ROCSET

(EQ. 6)

The IC monitors the voltage of the OCSET pin and the VO pin.

When the voltage of the OCSET pin is higher than the voltage of

the VO pin for more than 10µs, an OCP fault latches the

converter off.

The value of ROCSET is calculated with Equation 7, which is

written as:

ROCSET

=

I--O-----C-----⋅---D-----C-----R--

IOCSET

(EQ. 7)

Where:

- ROCSET (Ω) is the resistor used to program the overcurrent

setpoint

- IOC is the output DC load current that will activate the OCP

fault detection circuit

- DCR is the inductor DC resistance

For example, if IOC is 20A and DCR is 4.5mΩ, the choice of

ROCSET is equal to 20A x 4.5mΩ/8.5µA = 10.5kΩ.

Resistor ROCSET and capacitor CSEN form an R-C network to

sense the inductor current. To sense the inductor current

correctly not only in DC operation, but also during dynamic

operation, the R-C network time constant ROCSET CSEN needs to

match the inductor time constant L/DCR. The value of CSEN is

then written as Equation 8:

CSEN

=

--------------------L----------------------

ROCSET ⋅ DCR

(EQ. 8)

For example, if L is 1.5µH, DCR is 4.5mΩ, and ROCSET is 9kΩ, the

choice of CSEN = 1.5µH/(9kΩ x 4.5mΩ) = 0.037µF.

When an OCP fault is declared, the converter will be latched off and

the PGOOD pin will be asserted low. The fault will remain latched

until the EN pin has been pulled below the falling EN threshold

voltage VENTHF or if VCC has decayed below the falling POR

threshold voltage VVCC_THF.

Overvoltage

The overvoltage (OV) detection circuit triggers after the FB pin

voltage is above the rising overvoltage threshold VOVRTH for more

than 2µs. For example, if the converter is programmed to regulate

1.0V at the FB pin, that voltage would have to rise above the typical

VOVRTH threshold of 116% for more than 2µs to trigger an OV. In

numerical terms, that would be 116% x 1.0V = 1.16V. When an OV

is detected, the converter will take PGOOD low and continue to

switching. The converter is not latched off. When the converter

output voltage drops below the falling overvoltage threshold,

VOVFTH, for more than 2µs then PGOOD is taken high again and the

OV detection is considered cleared.

VOUT

116%

102%

PGOOD

MOSFET

ENABLE

CCM/DCM OPERATION

FIGURE 14. OVERVOLTAGE OPERATION

The falling overvoltage threshold VOVFTH is typically 102%. That

means if the FB pin voltage falls below 102% x 1.0V = 1.02V for

more than 2µs, the controller will return PGOOD high. Figure 14

shows a simple illustration of PGOOD operation during an OV

detection event. The cross hatch portion of the PGOOD waveform

shown represents the 2µs recognition time prior to the PGOOD

transition.

Undervoltage

The UVP fault detection circuit triggers after the FB pin voltage is

below the undervoltage threshold VUVTH for more than 2µs. For

example, if the converter is programmed to regulate 1.0V at the FB

pin, that voltage would have to fall below the typical VUVTH

threshold of 84% for more than 2µs in order to trip the UVP fault

latch. In numerical terms, that would be 84% x 1.0V = 0.84V.

When a UVP fault is declared, the converter will be latched off and

the PGOOD pin will be asserted low. The fault will remain latched

until the EN pin has been pulled below the falling EN threshold

voltage VENTHF or if VCC has decayed below the falling POR

threshold voltage VVCC_THF.

11

FN8390.0

December 10, 2012

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