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ISL6252

Highly Integrated Battery Charger Controller for Notebook Computers

Intersil 

ISL6252, ISL6252A

LDO Regulator

VDD provides a 5.0V supply voltage from the internal LDO

regulator from DCIN and can deliver up to 30mA of current.

The MOSFET drivers are powered by VDDP, which must be

connected to VDDP as shown in Figure 2. VDDP connects

to VDD through an external low pass filter. Bypass VDDP

and VDD with a 1µF capacitor.

Shutdown

The ISL6252 features a low-power shutdown mode. Driving

EN low shuts down the ISL6252. In shutdown, the DC/DC

converter is disabled, and VCOMP and ICOMP are pulled to

ground. The ICM, ACPRN output continue to function.

EN can be driven by a thermistor to allow automatic

shutdown of the ISL6252 when the battery pack is hot. Often

a NTC thermistor is included inside the battery pack to

measure its temperature. When connected to the charger,

the thermistor forms a voltage divider with a resistive pull-up

to the VREF. The threshold voltage of EN is 1.0V with 60mV

hysteresis. The thermistor can be selected to have a

resistance vs temperature characteristic that abruptly

decreases above a critical temperature. This arrangement

automatically shuts down the ISL6252 when the battery pack

is above a critical temperature.

Another method for inhibiting charging is to force CHLIM

below 85mV (typ).

Short Circuit Protection and 0V Battery Charging

Since the battery charger will regulate the charge current to

the limit set by CHLIM, it automatically has short circuit

protection and is able to provide the charge current to wake

up an extremely discharged battery.

Over-Temperature Protection

If the die temp exceeds +150°C, it stops charging. Once the

die temp drops below +125°C, charging will start up again.

Overvoltage Protection

ISL6252 has an Overvoltage Protection circuit that limits the

output voltage when the battery is removed or disconnected

by a pulse charging circuit. If CSON exceeds the output

voltage set point by more than VOVP an internal comparator

pulls VCOMP down and turns off both upper and lower FETs

of the buck as in Figure 17. The trip point for Overvoltage

Protection is always above the nominal output voltage and

can be calculated from Equation 15:

VOVP

=

VO

U

T,

N

OM

+

NC

E

LLS

×

⎛

⎝

42.2 m V

–

22.2

m

V

×

2-V---.-A-3---9D----VJ--⎠⎞

(EQ. 15)

For example, if the CELLS pin is connected to ground

(NCELLS = 3) and VADJ is floating (VADJ = 1.195V) then

VOUT,NOM = 12.6V and VOVP=12.693V or

VOUT,NOM + 93mV.

There is a delay of approximately 400nsec between VOUT

exceeding the OVP trip point and pulling VCOMP, LGATE

and UGATE low.

VCOMP

VOUT

ICOMP

WHEN VOUT EXCEEDS

THE OVP THRESHOLD

VCOMP IS PULLED LOW

AND FETS TURN OFF

BATTERY

REMOVAL

PHASE

CURRENT FLOWS IN THE

LOWER FET BODY DIODE

UNTIL INDUCTOR CURRENT

REACHES ZERO

FIGURE 17. OVERVOLTAGE PROTECTION IN ISL6252

Application Information

The following battery charger design refers to the typical

application circuit in Figure 2, where typical battery

configuration of 4S2P is used. This section describes how to

select the external components including the inductor, input

and output capacitors, switching MOSFETs, and current

sensing resistors.

Inductor Selection

The inductor selection has trade-offs between cost, size,

cross over frequency and efficiency. For example, the lower

the inductance, the smaller the size, but ripple current is

higher. This also results in higher AC losses in the magnetic

core and the windings, which decrease the system

efficiency. On the other hand, the higher inductance results

in lower ripple current and smaller output filter capacitors,

but it has higher DCR (DC resistance of the inductor) loss,

lower saturation current and has slower transient response.

So, the practical inductor design is based on the inductor

ripple current being ±15% to ±20% of the maximum

operating DC current at maximum input voltage. Maximum

ripple is at 50% duty cycle or VBAT = VIN,MAX/2. The

required inductance can be calculated from Equation 16:

L = 4-----⋅---f--S-V---W-I--N----⋅,--M-I-R---A--I--PX---P----L----E--

(EQ. 16)

Where VIN,MAX and fSW are the maximum input voltage,

and switching frequency, respectively.

15

FN6498.1

July 19, 2007

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