IP101A Просмотр технического описания (PDF) - Unspecified

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IP101A

Single port 10/100 Fast Ethernet Transceiver

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Register Descriptions (continued)

Bit

Name

Description/Usage

Register 2 : PHY Identifier Register 1

15:0 PHYID1

PHY identifier ID for software recognize IP101A LF

IP101A LF

Data Sheet

Default value

(h): 0243

0X0243, RO

Bit

Name

Description/Usage

Register 3 : PHY Identifier Register 2

15:0 PHYID2

PHY identifier ID for software recognize

Default value

(h): 0C54

0X0C54, RO

Note : Register 2 and register 3 identifier registers altogether consist of Vender model, model revision

number and Organizationally Unique identifier (OUI) information. Total of 32 bits allocate in these 2

registers and they can return all zeroes in all bits if desired. Register 2 contains OUI’s most significant bits

and OUI’s least significant bits, Vender model, Model revision number are allocated in register 3.

Copyright © 2004, IC Plus Corp.

15/36

Oct 22, 2007

IP101A LF-DS-R12

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