IDT82V3380A Просмотр технического описания (PDF) - Integrated Device Technology

Номер в каталоге

Компоненты Описание

производитель

IDT82V3380A

SYNCHRONOUS ETHERNET IDT WAN PLL™

Integrated Device Technology 

IDT82V3380A

SYNCHRONOUS ETHERNET WAN PLL™

Table 1: Pin Description (Continued)

Name

OUT3

OUT4

OUT5

OUT6_POS

OUT6_NEG

OUT7_POS

OUT7_NEG

OUT8_POS

OUT8_NEG

OUT9

CS

INT_REQ

MPU_MODE0

MPU_MODE1

MPU_MODE2

Pin No.

90

93

94

34

35

36

37

28

27

95

I/O

8

60

59

58

I/O

O

O

O

O

O

O

O

I

pull-up

O

I

pull-down

Type

Description 1

CMOS

OUT3: Output Clock 3

A 1 Hz, 400 Hz, 2 kHz, 8 kHz, 64 kHz, N x E1 4, N x T1 5, N x 13.0 MHz 6, N x 3.84 MHz 7, 5 MHz,

10 MHz, 20 MHz, 25 MHz, E3, T3, 6.48 MHz, 19.44 MHz, 25.92 MHz, 38.88 MHz, 51.84 MHz,

77.76 MHz, 125 MHz, 155.52 MHz, 156.25 MHz or 312.5 MHz clock is output on this pin.

CMOS

OUT4: Output Clock 4

A 1 Hz, 400 Hz, 2 kHz, 8 kHz, 64 kHz, N x E1 4, N x T1 5, N x 13.0 MHz 6, N x 3.84 MHz 7, 5 MHz,

10 MHz, 20 MHz, E3, T3, 6.48 MHz, 19.44 MHz, 25.92 MHz, 38.88 MHz, 51.84 MHz, 77.76 MHz

or 155.52 MHz clock is output on this pin.

CMOS

OUT5: Output Clock 5

A 1 Hz, 400 Hz, 2 kHz, 8 kHz, 64 kHz, N x E1 4, N x T1 5, N x 13.0 MHz 6, N x 3.84 MHz 7, 5 MHz,

10 MHz, 20 MHz, E3, T3, 6.48 MHz, 19.44 MHz, 25.92 MHz, 38.88 MHz, 51.84 MHz, 77.76 MHz

or 155.52 MHz clock is output on this pin.

OUT6_POS / OUT6_NEG: Positive / Negative Output Clock 6

PECL/LVDS A 1 Hz, 400 Hz, 2 kHz, 8 kHz, 64 kHz, N x E1 4, N x T1 5, N x 13.0 MHz 6, N x 3.84 MHz 7, 5 MHz,

10 MHz, 20 MHz, E3, T3, 6.48 MHz, 19.44 MHz, 25.92 MHz, 38.88 MHz, 51.84 MHz, 77.76 MHz,

155.52 MHz, 311.04 MHz or 622.08 MHz clock is differentially output on this pair of pins.

OUT7_POS / OUT7_NEG: Positive / Negative Output Clock 7

A 1 Hz, 400 Hz, 2 kHz, 8 kHz, 64 kHz, N x E1 4, N x T1 5, N x 13.0 MHz 6, N x 3.84 MHz 7, 5 MHz,

PECL/LVDS 10 MHz, 20 MHz, 25 MHz, E3, T3, 6.48 MHz, 19.44 MHz, 25.92 MHz, 38.88 MHz, 51.84 MHz,

77.76 MHz, 125 MHz, 155.52 MHz, 156.25 MHz, 311.04 MHz, 312.5 MHz or 622.08 MHz clock is

differentially output on this pair of pins.

OUT8_POS / OUT8_NEG: Positive / Negative Output Clock 8

AMI A 64 kHz + 8 kHz or 64 kHz + 8 kHz + 0.4 kHz composite clock is differentially output on this pair

of pins.

CMOS

OUT9: Output Clock 9

A 1.544 MHz (SONET) / 2.048 MHz (SDH) BITS/SSU clock is output on this pin.

Microprocessor Interface

CMOS

CMOS

CMOS

CS: Chip Selection

In EPROM mode, this pin is an output. In Multiplexed, Intel, Motorola and Serial modes, this pin is

an input. A transition from high to low must occur on this pin for each read or write operation and

this pin should remain low until the operation is over.

INT_REQ: Interrupt Request

This pin is used as an interrupt request. The output characteristics are determined by the HZ_EN

bit (b1, 0CH) and the INT_POL bit (b0, 0CH).

MPU_MODE[2:0]: Microprocessor Interface Mode Selection

The device supports five microprocessor interface modes: EPROM, Multiplexed, Intel, Motorola

and Serial.

During reset, these pins determine the default value of the MPU_SEL_CNFG[2:0] bits (b2~0, 7FH)

as follows:

001 (EPROM mode);

010 (Multiplexed mode);

011 (Intel mode);

100 (Motorola mode);

101 (Serial mode);

110 - 111 (Reserved).

After reset, these pins are general purpose inputs. The microprocessor interface mode is selected

by the MPU_SEL_CNFG[2:0] bits (b2~0, 7FH).

After reset de-assertion, wait 10 µs for the mode to be active.

The value of these pins is always reflected by the MPU_PIN_STS[2:0] bits (b2~0, 02H).

Pin Description

15

May 16, 2011

Share Link: