HT56R65 Просмотр технического описания (PDF) - Holtek Semiconductor
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HT56R65 Datasheet PDF : 145 Pages
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HT56R62/HT56R65
HT56R642/HT56R644/HT56R654/HT56R656
TinyPowerTM A/D Type with LCD 8-Bit OTP MCU
The following tables depict the device dependent pins.
Pin Name
I/O
Configuration
Option
Description
HT56R62
VMAX
I
—
IC maximum voltage, connect to VDD, VLCD1 or V1
VLCD1/VLCD2/V1,
C1, C2
—
—
LCD Voltage pump pins for C-type biasing.
For R-type biasing only pin VLCD1 are used.
SEG0~SEG4
O
SEG5/SDO
O
SEG6/SDI/SDA I/O
SEG7/SCK/SCL I/O
SEG8/SCS
I/O
SEG9/PCLK
O
SEG10/PINT
I/O
SEG11~SEG23
O
SIM
PINT
SEG0~SEG23 are LCD driver outputs for LCD panel segments.
SEG5 is pin-shared with the SPI bus data output line, SDO.
SEG6 is pin-shared with the SPI bus data input line, SDI and the I2C Bus
data line SDA.
SEG7 is pin-shared with the SPI bus clock line, SCK and the I2C Bus
clock line SCL.
SEG8 is pin-shared with the SPI bus select line, SCS.
SEG9 is pin-shared with the Peripheral Clock line, PCLK.
SEG10 is pin-shared with the Peripheral Interrupt line, PINT.
The SEG0~SEG15 lines can be can be chosen to be either segment
drivers or CMOS outputs using control bits in the LCD control registers.
COM0~COM2
COM3/SEG24
O
COM0~COM2 are the LCD common outputs. A bit in the LCD Control
—
Register determines if pin COM3/SEG24 is configured as a segment
driver or as a common output driver.
HT56R65
VMAX
I
—
IC maximum voltage, connect to VDD, VLCD1 or V1
VLCD1/VLCD2/V1,
C1, C2
—
—
LCD Voltage pump pins for C-type biasing.
For R-type biasing only pin VLCD1 are used.
SEG0~SEG15
O
SEG16/SDO
O
SEG17/SDI/SDA I/O
SEG18/SCK/SCL I/O
SEG19/SCS
I/O
SEG20/PCLK
O
SEG21/PINT
I/O
SEG22~SEG39
O
SIM
PINT
SEG0~SEG39 are LCD driver outputs for LCD panel segments.
SEG16 is pin-shared with the SPI bus data output line, SDO.
SEG17 is pin-shared with the SPI bus data input line, SDI and the I2C Bus
data line SDA.
SEG18 is pin-shared with the SPI bus clock line, SCK and the I2C Bus
clock line SCL.
SEG19 is pin-shared with the SPI bus select line, SCS.
SEG20 is pin-shared with the Peripheral Clock line, PCLK.
SEG21 is pin-shared with the Peripheral Interrupt line, PINT.
The SEG0~SEG23 lines can be can be chosen to be either segment
drivers or CMOS outputs using control bits in the LCD control registers.
COM0~COM2
COM3/SEG40
O
COM0~COM2 are the LCD common outputs. A bit in the LCD Control
—
Register determines if pin COM3/SEG40 is configured as a segment
driver or as a common output driver.
HT56R642
VLCD
I
—
LCD bias pin − must less than or equal to VDD
SEG0~SEG9
SEG10/SDO
SEG11/SDI/SDA
SEG12/SCK/SCL
SEG13/SCS
SEG14/PCLK
SEG15/PINT
COM15/SEG16~
COM8/SEG23
O
O
I/O
I/O
I/O
O
I/O
O
SIM
PINT
SEG0~SEG15 are LCD driver outputs for LCD panel segments.
SEG10 is pin-shared with the SPI bus data output line, SDO.
SEG11 is pin-shared with the SPI bus data input line, SDI and the I2C Bus
data line SDA.
SEG12 is pin-shared with the SPI bus clock line, SCK and the I2C Bus
clock line SCL.
SEG13 is pin-shared with the SPI bus select line, SCS.
SEG14 is pin-shared with the Peripheral Clock line, PCLK.
SEG15 is pin-shared with the Peripheral Interrupt line, PINT.
The SEG0~SEG15 lines can be can be chosen to be either segment
drivers or CMOS outputs using control bits in the LCD control registers.
COM0~COM7
O
—
COM0~COM7 are the LCD common outputs.
Rev. 1.30
12
March 6, 2013
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