HT49RA0 Просмотр технического описания (PDF) - Holtek Semiconductor
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HT49RA0 Datasheet PDF : 39 Pages
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HT49RA0/HT49CA0
Stack Register - STACK
The stack register is a special part of the memory used
to save the contents of the program counter. The stack
is organized into 4 levels and is neither part of the data
nor part of the program, and is neither readable nor
writeable. Its activated level is indexed by a stack
pointer (SP) and is neither readable nor writeable. At a
commencement of a subroutine call or an interrupt ac-
knowledgment, the contents of the program counter is
pushed onto the stack. At the end of the subroutine or in-
terrupt routine, signaled by a return instruction (RET or
RETI), the contents of the program counter is restored
to its previous value from the stack. After chip reset, the
SP will point to the top of the stack.
If the stack is full and a non-masked interrupt takes
place, the interrupt request flag is recorded but the ac-
knowledgment is still inhibited. Once the SP is decre-
mented (by RET or RETI), the interrupt is serviced. This
feature prevents stack overflow, allowing the program-
mer to use the structure easily. Likewise, if the stack is
full, and a ²CALL² is subsequently executed, a stack
overflow occurs and the first entry is lost (only the most
recent 4 return addresses are stored).
Data Memory - RAM
The data memory is divided into two functional group :
special function registers (20´8) and general purpose
data memory (96´8). Most of them are read/write, but
some are read only.
The unused space before 20H is reserved for future ex-
panded usage and reading these locations will return
the result 00H. The general purpose data memory, ad-
dressed from 20H to 7FH, is used for data and control
information under instruction command. The areas in
the RAM can directly handle arithmetic, logic, incre-
ment, decrement, and rotate operations. Except some
dedicated bits, each bit in the RAM can be set and reset
by ²SET [m].i² and ²CLR [m].i². They are also indirectly
accessible through the Memory pointer register 0
(MP0;01H) or the Memory pointer register 1 (MP1;03H).
Indirect Addressing Register
Location 00H and 02H are indirect addressing registers
that are not physically implemented. Any read/write op-
eration of [00H] and [02H] accesses the RAM pointed to
by MP0 (01H) and MP1(03H) respectively. Reading lo-
cation 00H or 02H indirectly returns the result 00H.
While, writing it indirectly leads to no operation.
The function of data movement between two indirect ad-
dressing registers is not supported. The memory pointer
registers, MP0 and MP1, are both 7-bit registers used to
access the RAM by combining corresponding indirect
addressing registers. MP0 can only be applied to data
memory, while MP1 can be applied to data memory and
LCD display memory.
0 0 H In d ir e c t A d d r e s s in g R e g is te r 0
01H
M P0
0 2 H In d ir e c t A d d r e s s in g R e g is te r 1
03H
M P1
04H
BP
05H
ACC
06H
PCL
07H
TB LP
08H
TB LH
09H
R TC C
0A H
STATU S
0B H
IN T C 0
0C H
0D H
TM R
0E H
TM R C
0FH
10H
11H
12H
PA
13H
14H
PB
15H
16H
PC
17H
PCC
18H
19H
1A H
1B H
1C H
1D H
1E H
IN T C 1
1FH
LC D C
20H
G e n e ra l P u rp o s e
D a ta M e m o ry
(9 6 B y te s )
S p e c ia l P u r p o s e
D a ta M e m o ry
:U nused.
R e a d a s ²0 0 ²
7FH
RAM Mapping
Accumulator - ACC
The accumulator (ACC) is related to the ALU opera-
tions. It is also mapped to location 05H of the RAM and
is capable of operating with immediate data. The data
movement between two data memory locations must
pass through the ACC.
Arithmetic and Logic Unit - ALU
This circuit performs 8-bit arithmetic and logic opera-
tions and provides the following functions:
· Arithmetic operations (ADD, ADC, SUB, SBC, DAA)
· Logic operations (AND, OR, XOR, CPL)
· Rotation (RL, RR, RLC, RRC)
· Increment and Decrement (INC, DEC)
· Branch decision (SZ, SNZ, SIZ, SDZ etc.)
The ALU not only saves the results of a data operation but
also changes the status register.
Rev. 1.20
7
October 24, 2007
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