HT46R48 Просмотр технического описания (PDF) - Holtek Semiconductor

Номер в каталоге

Компоненты Описание

производитель

HT46R48

Cost-Effective A/D Type 8-Bit OTP MCU

Holtek Semiconductor 

HT46R48

Bit No. Label

Function

ACS2, ACS1, ACS0: Select A/D channel

0

1

2

ACS0

ACS1

ACS2

0, 0, 0: AN0

0, 0, 1: AN1

0, 1, 0: AN2

0, 1, 1: AN3

1, X, X: undefined, cannot be used

2

¾ Unused bit, read as ²0².

PCR2, PCR1, PCR0: PB3~PB0 configurations

3

4

5

PCR0

PCR1

PCR2

0, 0, 0: PB3 PB2 PB1 PB0 (The ADC circuit is power off to reduce power consumption.)

0, 0, 1: PB3 PB2 PB1 AN0

0, 1, 0: PB3 PB2 AN1 AN0

0, 1, 1: PB3 AN2 AN1 AN0

1, x, x: AN3 AN2 AN1 AN0

Indicates end of A/D conversion. (0 = end of A/D conversion)

6 EOCB Each time bits 3~5 change state the A/D should be initialized by issuing a START signal, other-

wise the EOCB flag may have an undefined condition. See ²Important note for A/D initialization².

7 START Starts the A/D conversion. (0®1®0= start; 0®1= Reset A/D converter and set EOCB to ²1²)

ADCR (22H) Register

Bit No. Label

Function

Select the A/D converter clock source.

0

1

ADCS0

ADCS1

0, 0: fSYS/2

0, 1: fSYS/8

1, 0: fSYS/32

1, 1: Undefined

2~6

¾ Unused bit, read as ²0².

7

TEST For internal test only.

ACSR (23H) Register

STAR T

M in im u m o n e in s tr u c tio n c y c le n e e d e d , M a x im u m te n in s tr u c tio n c y c le s a llo w e d

EO CB

A /D s a m p lin g tim e

tA D C S 1

tA D C S 2

A /D s a m p lin g tim e

tA D C S 1

tA D C S 2

A /D s a m p lin g tim e

tA D C S 1

tA D C S 2

P C R 2~

PCR0

000B

A C S 2~

ACS0

000B

P o w e r-o n

R eset

100B

010B

S ta rt o f A /D

c o n v e r s io n

100B

000B

S ta rt o f A /D

c o n v e r s io n

101B

001B

S ta rt o f A /D

c o n v e r s io n

000B

1 . P B p o rt s e tu p a s I/O s

2 . A /D c o n v e r te r is p o w e r e d o ff

to r e d u c e p o w e r c o n s u m p tio n

d o n 't c a r e

R e s e t A /D

c o n v e rte r

R e s e t A /D

c o n v e rte r

R e s e t A /D

c o n v e rte r

1 : D e fin e P B c o n fig u r a tio n

E n d o f A /D

c o n v e r s io n

E n d o f A /D

c o n v e r s io n

E n d o f A /D

c o n v e r s io n

2 : S e le c t a n a lo g c h a n n e l

tA D C 1

tA D C 2

A /D c o n v e r s io n tim e

tA D C 1

tA D C 2

A /D c o n v e r s io n tim e

tA D C 1

tA D C 2

A /D c o n v e r s io n tim e

N o te :

A /D c lo c k m u s t b e fS Y S /2 , fS Y S /8 o r fS Y S /3 2

tA D C S 1 = 3 2 tA D fo r H T 4 6 R 4 6 /H T 4 6 C 4 6

tA D C S 2 = 3 2 tA D fo r H T 4 6 R 4 7 /H T 4 6 C 4 7

tA D C 1 = 6 4 tA D fo r H T 4 6 R 4 6 /H T 4 6 C 4 6

tA D C 2 = 7 6 tA D fo r H T 4 6 R 4 7 /H T 4 6 C 4 7

A/D Conversion Timing

Rev. 1.10

18

March 24, 2006

Share Link: