HT46R343 Просмотр технического описания (PDF) - Holtek Semiconductor
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HT46R343 Datasheet PDF : 40 Pages
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HT46R343
Program Memory - ROM
The program memory is used to store the program in-
structions which are to be executed as well as table data
and interrupt entries. It is structured into 4K´15 bits de-
vice, which can be addressed by both the program
counter and table pointer.
Certain locations in the program memory are reserved
for use by the reset and by the interrupt vectors.
· Location 000H
This vector is reserved for program initialisation. After
a device reset is initiated, the program will jump to this
location and begin execution.
· Location 004H
This vector is used by the external interrupt INT. If the
external interrupt pin on the device receives a low go-
ing edge, the program will jump to this location and be-
gin execution if the external interrupt is enabled and
the stack is not full.
· Location 008H
This vector is used by the Timer/Event Counter 0. If a
timer overflow occurs, the program will jump to this loca-
tion and begin execution if the timer interrupt is enabled
and the stack is not full.
· Location 00CH
This vector is used by the Timer/Event Counter 1. If a
timer overflow occurs, the program will jump to this loca-
tion and begin execution if the timer interrupt is enabled
and the stack is not full.
· Location 010H
This vector is used by the A/D converter. When an A/D
cycle conversion is complete, the program will jump to
this location and begin execution if the A/D interrupt is
enabled and the stack is not full.
· Table location
Any location in the Program Memory space can be
used as a look-up table. The instructions ²TABRDC
[m]² (the current page, 1 page=256 words) and
²TABRDL [m]² (the last page) transfer the contents of
the lower-order byte to the specified data memory, and
the higher-order byte to TBLH. Only the destination of
the lower-order byte in the table is well-defined, the
other bits of the table word are transferred to the lower
portion of TBLH, and the remaining bits are read as ²0².
The Table Higher-order byte register (TBLH) is read
only. The table pointer (TBLP) is a read/write register,
which indicates the table location. Before accessing
the table, the location must be placed in TBLP. The
TBLH register is read only and cannot be restored. If
the main routine and the ISR, Interrupt Service Rou-
tine, both employ the table read instruction, the con-
tents of the TBLH in the main routine are likely to be
changed by the table read instruction used in the ISR.
In such a case errors can occur. Therefore, using the
table read instruction in the main routine and the ISR si-
multaneously should be avoided. However, if the table
read instruction has to be used in both the main routine
and the ISR, the interrupt is should be disabled prior to
the table read instruction. It should not be re-enabled
until the TBLH has been backed up. All table related in-
structions require two cycles to complete their opera-
tion. These areas may function as normal program
memory depending upon requirements.
000H
D e v ic e In itia liz a tio n P r o g r a m
0 0 40 H
E x te r n a l In te r r u p t S u b r o u tin e
0 0 48 H
T im e r /E v e n t C o u n te r 0 In te r r u p t S u b r o u tin e
00C H
T im e r /E v e n t C o u n te r 1 In te r r u p t S u b r o u tin e
010H
A /D C o n v e r te r In te r r u p t S u b r o u tin e
P ro g ra m
M e m o ry
n00H
L o o k - u p T a b le ( 2 5 6 w o r d s )
nFFH
700H
L o o k - u p T a b le ( 2 5 6 w o r d s )
7FFH
1 4 b its
Program Memory
Stack Register - STACK
This is a special part of the memory which is used to
save the contents of the program counter only. The
stack is organized into 6 levels and is neither part of the
data nor part of the program space, and is neither read-
able nor writeable. The activated level is indexed by the
stack pointer, known as stack pointer, and is also neither
readable nor writeable. At a subroutine call or interrupt
acknowledgment, the contents of the program counter
are pushed onto the stack. At the end of a subroutine or
an interrupt routine, signaled by a return instruction,
Instruction
TABRDC [m]
TABRDL [m]
*11 *10 *9
P11 P10 P9
1
1
1
Note: *11~*0: Table location bits
@7~@0: Table pointer bits
Table Location
*8
*7
*6
*5
*4
*3
*2
*1
*0
P8 @7 @6 @5 @4 @3 @2 @1 @0
1 @7 @6 @5 @4 @3 @2 @1 @0
Table Location
P11~P8: Current program counter bits
Rev. 1.00
8
October 11, 2007
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