HT46R064 Просмотр технического описания (PDF) - Holtek Semiconductor

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HT46R064

Enhanced A/D Type 8-Bit OTP MCU

Holtek Semiconductor 

HT46R064/065/066/0662/067

H T46R 064

00H

IA R 0

01H

M P0

H T46R 065

IA R 0

M P0

H T46R 066

IA R 0

M P0

3FH

40H

7 F H 6 4 b y te s

9 6 b y te s

1 2 8 b y te s

9FH

BFH

S p e c ia l

P u rp o s e

R e g is te r s

G e n e ra l

P u rp o s e

R e g is te r s

H T46R 0662

B ank 0

B ank 1

00H

IA R 0

IA R 0

01H

M P0

M P0

3FH

40H

T o ta l 2 2 4 b y te s

5FH

FFH

S p e c ia l

P u rp o s e

R e g is te r s

G e n e ra l

P u rp o s e

R e g is te r s

H T46R 067

B ank 0

B ank 1

00H

IA R 0

IA R 0

01H

M P0

M P0

3FH

40H

T o ta l 3 8 4 b y te s

FFH

S p e c ia l

P u rp o s e

R e g is te r s

G e n e ra l

P u rp o s e

R e g is te r s

Data Memory Structure

Note:

Most of the Data Memory bits can be directly

manipulated using the ²SET [m].i² and ²CLR

[m].i² with the exception of a few dedicated bits.

The Data Memory can also be accessed

through the memory pointer registers.

Special Purpose Data Memory

This area of Data Memory is where registers, necessary

for the correct operation of the microcontroller, are

stored. Most of the registers are both readable and

writeable but some are protected and are readable only,

the details of which are located under the relevant Spe-

cial Function Register section. Note that for locations

that are unused, any read instruction to these addresses

will return the value ²00H².

Special Function Registers

To ensure successful operation of the microcontroller,

certain internal registers are implemented in the Data

Memory area. These registers ensure correct operation

of internal functions such as timers, interrupts, etc., as

well as external functions such as I/O data control. The

location of these registers within the Data Memory be-

gins at the address ²00H² and are mapped into both

Bank 0 and Bank 1. Any unused Data Memory locations

between these special function registers and the point

where the General Purpose Memory begins is reserved

and attempting to read data from these locations will re-

turn a value of ²00H².

Indirect Addressing Registers - IAR0, IAR1

The Indirect Addressing Registers, IAR0 and IAR1, al-

though having their locations in normal RAM register

space, do not actually physically exist as normal regis-

ters. The method of indirect addressing for RAM data

manipulation uses these Indirect Addressing Registers

and Memory Pointers, in contrast to direct memory ad-

dressing, where the actual memory address is speci-

fied. Actions on the IAR0 and IAR1 registers will result in

no actual read or write operation to these registers but

rather to the memory location specified by their corre-

sponding Memory Pointer, MP0 or MP1. Acting as a

pair, IAR0 with MP0 and IAR1 with MP1 can together ac-

cess data from the Data Memory. As the Indirect Ad-

dressing Registers are not physically implemented,

reading the Indirect Addressing Registers indirectly will

return a result of ²00H² and writing to the registers indi-

rectly will result in no operation.

Memory Pointers - MP0, MP1

Two Memory Pointers, known as MP0 and MP1 are pro-

vided. These Memory Pointers are physically imple-

mented in the Data Memory and can be manipulated in

the same way as normal registers providing a conve-

nient way with which to indirectly address and track

data. MP0 can only be used to indirectly address data in

Bank 0 while MP1 can be used to address data in Bank

0 and Bank1. When any operation to the relevant Indi-

rect Addressing Registers is carried out, the actual ad-

dress that the microcontroller is directed to, is the

address specified by the related Memory Pointer. Note

that for the HT46R064 device, bit 7 of the Memory

Pointers is not required to address the full memory

space. When bit 7 of the Memory Pointers for these de-

vices is read, a value of ²1² will be returned. Note that in-

direct addressing using MP1 and IAR1 must be used to

access any data in Bank 1. The following example shows

how to clear a section of four Data Memory locations al-

ready defined as locations adres1 to adres4.

Rev. 1.20

21

October 23, 2012

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