HT46R005 Просмотр технического описания (PDF) - Holtek Semiconductor

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HT46R005

Small Package 8-Bit OTP MCU

Holtek Semiconductor 

HT48R005/HT46R005

Internal RC Oscillator - HIRC

The internal RC oscillator is a fully integrated system os-

cillator requiring no external components. The internal

RC oscillator has three fixed frequencies of either

4MHz, 8MHz or 12MHz. Device trimming during the

manufacturing process and the inclusion of internal fre-

quency compensation circuits are used to ensure that

the influence of the power supply voltage, temperature

and process variations on the oscillation frequency are

minimised. As a result, at a power supply of either 3V or

5V and at a temperature of 25 degrees, the fixed oscilla-

tion frequency of 4MHz, 8MHz or 12MHz will have a tol-

erance within 2%. Note that if this internal system clock

option is selected, as it requires no external pins for its

operation, I/O pins PA5 and PA6 are free for use as nor-

mal I/O pins.

P A 5 /O S C 2

P A 6 /O S C 1

In te rn a l R C

O s c illa to r

N o te : P A 5 /P A 6 u s e d a s n o rm a l I/O s

Internal RC Oscillator - HIRC

Internal Low Speed Oscillator - LIRC

The LIRC is a fully self-contained free running on-chip

RC oscillator with a typical frequency of 13kHz at 5V re-

quiring no external components. When the device en-

ters the Sleep Mode, the system clock will stop running

but the WDT oscillator continues to free-run and to keep

the watchdog active. However, to preserve power in cer-

tain applications the LIRC can be disabled via a configu-

ration option.

Operating Modes

The system can be selected to operate in two modes.

These Modes are Normal and Sleep.

Operating

Mode

Normal

Sleep

OSC1/OSC2 Configuration

HXT

ERC

HIRC

Run

Run

Run

Stop

Stop

Stop

Operating Mode Control

Mode Switching

The devices are switched between one mode and an-

other using the HALT instruction. The HALT instruction

forces the system into the Sleep Mode.

When a HALT instruction is executed, the system enters

the Sleep mode the following conditions exist:

· The system oscillator will stop running and the appli-

cation program will stop at the ²HALT² instruction.

· The Data Memory contents and registers will maintain

their present condition.

· The WDT will be cleared and resume counting if the

WDT clock source is selected to come from the WDT

oscillator. The WDT will stop if its clock source origi-

nates from the system clock.

· The I/O ports will maintain their present condition.

· In the status register, the Power Down flag, PDF, will

be set and the Watchdog time-out flag, TO, will be

cleared.

HXT

fH X T

ERC

fE R C

H IR C

f H IR C

C o n fig u r a tio n O p tio n

( N o r m a l)

M UX

fS Y S

C o n fig u r a tio n O p tio n

L IR C

f L IR C

fS Y S /4

M UX

fW D T C K

to w a tc h d o g tim e r

System Clock Configurations

Rev. 1.20

21

September 26, 2012

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