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HFA1106IP Просмотр технического описания (PDF) - Intersil

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HFA1106IP Datasheet PDF : 16 Pages
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HFA1106
bandwidth significantly reduces system noise. Figure 3 illustrates
the noise performance of the HFA1106 with its bandwidth limited
to 40MHz by a 10pF CCOMP. As expected the noise decreases
by approximately 37% (100% x (1-40MHz/100MHz)) compared
with Figure 2. The decrease is an even more dramatic 48%
versus the HFA1105 noise level in Figure 1.
enough, instability. To reduce this capacitance, the designer
should remove the ground plane under traces connected to
-IN, and keep connections to -IN as short as possible.
An example of a good high frequency layout is the Evaluation
Board shown in Figure 4.
Evaluation Board
The performance of the HFA1106 may be evaluated using
the HFA11XX Evaluation Board.
EN = 236µ VRMS
Figure 4 details the evaluation board layout and schematic.
Connecting RCOMP and CCOMP in series from socket pin 8
to the GND plane compensates the op amp. Cutting the
trace from pin 8 to the VH connector removes the stray par-
allel capacitance, which would otherwise affect the evalua-
tion. Additionally, the 500feedback and gain setting
resistors should be changed to the proper value for the gain
being evaluated.
FIGURE 3. HFA1106 NOISE PERFORMANCE,
COMPENSATED, AV = +2, RF = 100, CC = 10PF
Additionally, compensating the HFA1106 allows the use of a
lower value RF for a given gain. The decreased bandwidth
due to CCOMP keeps the amplifier stable by offsetting the
increased bandwidth from the lower RF . As noted previ-
ously, a lower value RF provides the double benefit of
reduced DC errors and lower total noise.
Less Lot-to-Lot Variability
External compensation provides another advantage by
allowing designers to set the op amp’s performance with a
precision external component. On-chip compensation
capacitors can vary by 10-20% over the process extremes.
A precise external capacitor dominates the on-chip compen-
sation for consistent lot-to-lot performance and more robust
designs. Compensating high frequency amplifiers to lower
bandwidths can simplify design tasks and ensure long term
manufacturability.
To order evaluation boards (part number HFA11XXEVAL),
please contact your local sales office.
VH
1
+IN
OUT
V+
VL V-
GND
TOP LAYOUT
PC Board Layout
This amplifier’s frequency response depends greatly on the
care taken in designing the PC board. The use of low
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid
ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
device’s input and output connections. Capacitance, para-
sitic or planned, connected to the output must be minimized,
compensated for by increasing CCOMP, or isolated by a
series output resistor.
Care must also be taken to minimize the capacitance to
ground at the amplifier’s inverting input (-IN), as this capaci-
tance causes gain peaking, pulse overshoot, and if large
BOTTOM LAYOUT
510
R1
1
50
2
IN
3
4
10µF 0.1µF
-5V
510
8
7
6
5
GND
VH
0.1µF
50
10µF
+5V
OUT
VL
GND
FIGURE 4. EVALUATION BOARD SCHEMATIC AND LAYOUT
3-33

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